JPH0156411B2 - - Google Patents

Info

Publication number
JPH0156411B2
JPH0156411B2 JP59249307A JP24930784A JPH0156411B2 JP H0156411 B2 JPH0156411 B2 JP H0156411B2 JP 59249307 A JP59249307 A JP 59249307A JP 24930784 A JP24930784 A JP 24930784A JP H0156411 B2 JPH0156411 B2 JP H0156411B2
Authority
JP
Japan
Prior art keywords
data
memory
address
write
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59249307A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61127050A (ja
Inventor
Kazuo Taki
Akisumi Mitsuishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP59249307A priority Critical patent/JPS61127050A/ja
Publication of JPS61127050A publication Critical patent/JPS61127050A/ja
Publication of JPH0156411B2 publication Critical patent/JPH0156411B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP59249307A 1984-11-26 1984-11-26 メモリ制御方式 Granted JPS61127050A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59249307A JPS61127050A (ja) 1984-11-26 1984-11-26 メモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59249307A JPS61127050A (ja) 1984-11-26 1984-11-26 メモリ制御方式

Publications (2)

Publication Number Publication Date
JPS61127050A JPS61127050A (ja) 1986-06-14
JPH0156411B2 true JPH0156411B2 (OSRAM) 1989-11-30

Family

ID=17191037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59249307A Granted JPS61127050A (ja) 1984-11-26 1984-11-26 メモリ制御方式

Country Status (1)

Country Link
JP (1) JPS61127050A (OSRAM)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6151661A (en) * 1994-03-03 2000-11-21 International Business Machines Corporation Cache memory storage space management system and method
JP2004303232A (ja) * 2003-03-20 2004-10-28 Matsushita Electric Ind Co Ltd データメモリキャッシュ装置及びデータメモリキャッシュシステム

Also Published As

Publication number Publication date
JPS61127050A (ja) 1986-06-14

Similar Documents

Publication Publication Date Title
US4593354A (en) Disk cache system
US20070016719A1 (en) Memory device including nonvolatile memory and memory controller
EP0019358B1 (en) Hierarchical data storage system
JPH05210585A (ja) キャッシュ管理システム
WO2004061673A2 (en) Method and apparatus for block oriented memory management provided in smart card controllers
JPS6111865A (ja) メモリアクセス制御方式
US5241639A (en) Method for updating data from a cache address location to main memory and maintaining the cache address in registration memory
JPH0115903B2 (OSRAM)
JPH0156411B2 (OSRAM)
US4424564A (en) Data processing system providing dual storage of reference bits
JPH044617B2 (OSRAM)
JPS6194159A (ja) メモリ装置
JP3335919B2 (ja) ディスクキャッシュ制御装置
JPH0255812B2 (OSRAM)
EP0400851A2 (en) Efficient cache utilizing a store buffer
JP3190661B2 (ja) 情報処理システム
JPH02188849A (ja) キャッシュメモリ方式
JPH05100926A (ja) 入出力管理方式
JP3219810B2 (ja) データ処理装置
JPH0689228A (ja) キャッシュメモリ制御装置
JPH10133948A (ja) キャッシュメモリ装置
JPS62297948A (ja) デ−タベ−スの障害回復方式
JP3074897B2 (ja) メモリ回路
JPH05257807A (ja) キャッシュメモリ制御装置
JPH07152650A (ja) キャッシュ制御装置

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term