JPH0153509B2 - - Google Patents

Info

Publication number
JPH0153509B2
JPH0153509B2 JP20976081A JP20976081A JPH0153509B2 JP H0153509 B2 JPH0153509 B2 JP H0153509B2 JP 20976081 A JP20976081 A JP 20976081A JP 20976081 A JP20976081 A JP 20976081A JP H0153509 B2 JPH0153509 B2 JP H0153509B2
Authority
JP
Japan
Prior art keywords
single crystal
recess
forming
film
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20976081A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58114439A (ja
Inventor
Hajime Kamioka
Mikio Takagi
Motoo Nakano
Takashi Iwai
Noriaki Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20976081A priority Critical patent/JPS58114439A/ja
Publication of JPS58114439A publication Critical patent/JPS58114439A/ja
Publication of JPH0153509B2 publication Critical patent/JPH0153509B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
JP20976081A 1981-12-28 1981-12-28 半導体装置の製造方法 Granted JPS58114439A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20976081A JPS58114439A (ja) 1981-12-28 1981-12-28 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20976081A JPS58114439A (ja) 1981-12-28 1981-12-28 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58114439A JPS58114439A (ja) 1983-07-07
JPH0153509B2 true JPH0153509B2 (en, 2012) 1989-11-14

Family

ID=16578170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20976081A Granted JPS58114439A (ja) 1981-12-28 1981-12-28 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58114439A (en, 2012)

Also Published As

Publication number Publication date
JPS58114439A (ja) 1983-07-07

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