JPH0127582B2 - - Google Patents

Info

Publication number
JPH0127582B2
JPH0127582B2 JP55006007A JP600780A JPH0127582B2 JP H0127582 B2 JPH0127582 B2 JP H0127582B2 JP 55006007 A JP55006007 A JP 55006007A JP 600780 A JP600780 A JP 600780A JP H0127582 B2 JPH0127582 B2 JP H0127582B2
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
chip
wafer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55006007A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56103455A (en
Inventor
Kenichi Oono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP600780A priority Critical patent/JPS56103455A/ja
Publication of JPS56103455A publication Critical patent/JPS56103455A/ja
Publication of JPH0127582B2 publication Critical patent/JPH0127582B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP600780A 1980-01-22 1980-01-22 Semiconductor ic device Granted JPS56103455A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP600780A JPS56103455A (en) 1980-01-22 1980-01-22 Semiconductor ic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP600780A JPS56103455A (en) 1980-01-22 1980-01-22 Semiconductor ic device

Publications (2)

Publication Number Publication Date
JPS56103455A JPS56103455A (en) 1981-08-18
JPH0127582B2 true JPH0127582B2 (enExample) 1989-05-30

Family

ID=11626663

Family Applications (1)

Application Number Title Priority Date Filing Date
JP600780A Granted JPS56103455A (en) 1980-01-22 1980-01-22 Semiconductor ic device

Country Status (1)

Country Link
JP (1) JPS56103455A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5892230A (ja) * 1981-11-27 1983-06-01 Mitsubishi Electric Corp 半導体装置
KR101223759B1 (ko) 2012-02-24 2013-01-17 주식회사 보루인터내셔날 진공용기용 고무밀봉재 및 이를 이용한 진공용기 뚜껑

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5845822B2 (ja) * 1975-03-07 1983-10-12 セイコーエプソン株式会社 シユウセキカイロ
JPS5654577Y2 (enExample) * 1976-12-28 1981-12-19

Also Published As

Publication number Publication date
JPS56103455A (en) 1981-08-18

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