JPH01251248A - Cache control system for stack data structure - Google Patents

Abstract

PURPOSE:To execute a stack access at high speed by bringing a block memory to make access as a cache memory in accordance with a stack write or read-out request. CONSTITUTION:A block memory BM 12 of a circulating buffer system consisting of plural blocks coordinated with a stack frame of a stack 21 secured in a main storage 20 is provided as a cache memory used exclusively for a stack data structure. When a stack write request is executed, write of data is executed against the next block of the latest effective block, and in case when the number of effective blocks in the BM 12 has reached the first prescribed number, data of the oldest effective block is transferred to the stack 21. Also, when the number of effective blocks in the BM 12 is below the second prescribed value by a read-out request, and also, an effective stack frame exists in the stack 21, the data is transferred to the block immediately before the oldest effective block in the BM 12.

Description

[Detailed Description of the Invention] , [Objective of the Invention] (Industrial Application Field) This invention provides a cache memory control method for tack data structures that enables stack access without directly accessing the stack reserved in main memory. Regarding.

(Prior art) In information processing devices that use a stack secured in main memory, there is no distinction between normal memory space and stack memory space, and therefore cache memory is also commonly used. . The configuration of the cache memory in such information processing devices uses an associative memory method with a high hit rate for discrete memory access, and takes into consideration multiprocessors, input/output, etc. A method in which data is also written to the memory and the content written in the cache memory is matched with the content in the corresponding area of the main memory is applied.

On the other hand, memory access to the stack is characterized in that data that has been written once is often read immediately after. For this reason, in the conventional method in which a cache memory shared with normal memory access is used for stack access, the next read access cannot be performed until the bus cycle of main memory write by the write-through method is completed, resulting in a decrease in performance. There is also the problem that data stored in the cache memory by stack access is evicted from the cache memory by normal memory access, reducing the hit rate.

(Issue 8 to be solved by the invention) As mentioned above, in the past, a common cache memory was used for stack access as well as for normal memory access, which reduced the cache hit rate and further reduced the overhead of stack access. There was a problem that caused an increase in the number of people.

Therefore, this invention solves the problem of speeding up stack access, which usually occurs most frequently, by creating a cache memory (block memory) dedicated to a new stack data structure that can make maximum use of the characteristics of stack access. This is an issue that should be addressed.

[Structure of the Invention] (Means for Solving the Problems) The present invention uses a circular buffer type block memory consisting of a plurality of blocks associated with stack frames of a stack secured in main memory as a cache memory dedicated to stack data structures. When a stack write request is made, data is written to the block next to the latest valid block in the block memory, and as a result of this writing, the number of valid blocks in the block memory reaches the first predetermined number. If a stack read is requested, the data of the oldest valid block in the block memory is transferred to the stack, and when a stack read is requested, data is read from the latest valid block in the block memory. When the number of valid blocks is less than a second predetermined number and there is a valid stack frame in the stack, the contents of the latest valid stack frame are transferred to the block immediately before the oldest valid block in the block memory. It is characterized by the following.

(Operation) When accessing the memory to the stack, data that has been written twice as described above is often read out immediately after.

In addition to these characteristics, 1.Accesses are concentrated near the address pointed to by the stack pointer.

■When writing, write several words at once, and don't worry about the timing of the writing. That is, there is no need to apply the write-through method.

There is a characteristic that. The above configuration takes advantage of this feature, and has a structure that allows a new valid block to be read out first, so that after writing to a block memory, it is always read from the same block memory at high speed. I can put it out. Additionally, since the oldest valid block is flushed out to the main memory, there is a risk that a stack access that references the same data will occur during data transfer in this block (see above).
.

As is clear from the characteristics of stack access in (2), the block transfer described above can be performed using free bus time without worrying about timing, and there is no overhead of stack access (especially read access immediately after writing). can be lowered.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of a portion directly related to the present invention of an information processing apparatus to which the present invention is applied. In the figure, 10 is a CPU.

20 is a main memory in which various program data and the like are stored. In this main memory 20, a stack (stack area) 21 for saving registers and the like is secured as necessary. The CPU10 includes a stack management mechanism 11. for managing the stack 21 and the like. and a circular buffer type block memory (hereinafter referred to as BM) 12 consisting of a plurality of blocks associated with the stack frame of the stack 21.
is provided. 8M12 is provided as a cache memory dedicated to the stack data structure, and is configured to store data that should be stored in the stack instead of the stack.

The stack management mechanism 11 includes a block memory pointer B for specifying (the position of) a block within the 8M12 to which to write instead of the stack 21 in response to a stack write request.
Block memory pointer register (hereinafter referred to as BMP register) 13 that sets MP, and (position of) stack frame in stack 21 that is the write destination in response to a stack write request if 8M12 does not exist (as in the conventional example). The well-known stack pointer S for specifying
Stack pointer register (hereinafter referred to as SP) that sets the PI
(referred to as I register) 14, and stack pointer SP
2 is set in the stack pointer register (hereinafter referred to as SP2
15 (referred to as a register) are provided. This stack pointer SP2 is the destination (stack 21
This is used to specify the internal stack frame. Here, the initial value of block memory pointer BMP is 8M12
0, stack pointer spi does not indicate the first block.

The initial value of SF3 is SPorg indicating the top stack frame of the stack 21 in ta20. In addition, 8M1
The block in block 2 and the stack frame in stack 21 consist of multiple entries, so an offset (offset address) is also required to specify the entry, but the block (stack frame)
Since the technique of accessing the target entry using the information specifying the offset and the information specifying the offset is well known, a description of the offset will be omitted.

Next, the operation of the configuration shown in FIG. 1 will be explained with reference to the flowchart shown in FIG. First, when a stack access request (instruction) is issued in CPUl0, the stack management mechanism 11 checks whether the request is a write request (to the stack 21) or not (a read request) (step S1).
, if it is a write request, the data that would conventionally be stored in the stack 21 is written as a block in BML2 pointed to by the block memory pointer BMP set in the BMP register 13 (step S2). Note that writing to the stack frame in the stack 21 pointed to by the stack pointer SPI set in the SPI register 14 is not performed here.

When the stack management mechanism 11 finishes step S2, the stack management mechanism 11 performs B
Advance block memory pointer BMP in MP register 13 to specify the next block, and
4 stack pointer SP1 is advanced to specify the next stack frame (steps 83 to S6). Here, the above-mentioned "next block" means that the current BMP is 8M12
If it does not match BMPmax indicating the last block in the block, it is the block indicated by BMP 11, and BMP
If it matches l1ax, it is a block indicated by 0 (first block). That is, 8M12 is used in a circular buffer manner. As is clear, step s3
~The block immediately before the block in the stack management mechanism 11 specified by the pointer BMP after execution of S6 is the latest valid block.

After completing steps 83 to s6, the stack management mechanism 11 determines whether the number of valid blocks in 8M12 has reached a first predetermined number (for example, the number of blocks held by 8M12).
A determination is made based on the stack pointer SPI of the I register 14 (for example, depending on whether SPI is greater than SPorg+BMPa+ax) (step S7). If the determination in step S7 is YES (here, 8M1
If it is determined that 2 is in the FULL state),
The stack management mechanism 11 is an empty block (invalid block)
(Here, the 8M12 block pointed to by BMP is assumed to be a free block), the contents of the 8M12 block pointed to by the block memory pointer BMP of the BMP register 13 are transferred to the stack pointer SP of the SP2 register 15.
Then, the stack pointer SP2 is advanced to point to the next stack frame, and the processing for the stack access (write) request is completed (step S8.39). On the other hand, if the determination in step S7 is NO (here, 8M12 is not in the FULL state), the stack management mechanism 11 directly ends the processing for the stack access (write) request. Note that when SF3>SPOrg, it is clear that each stack frame indicated by SPorg-8P2-1 is a valid stack frame.

Next, a stack access request (from stack 21)
The case of a read request will be explained.

In this case, the stack management mechanism 11
The stack pointer SPI of the BMP register 13 is returned to specify the previous stack frame, and the block memory pointer BMP of the BMP register 13 is changed back to the old BMP (pointer BMPo
ld) (step SIO, 5ll)
. Next, the stack management mechanism 11 returns the pointer BMP of the BMP register 13 to specify the previous block (steps S12 to S514), and returns the pointer BMP of the BMP register 13 to specify the previous block (in the conventional case, the cache memory or the data to be read from the stack 21 (step 515). Note that the above-mentioned "immediately preceding block" refers to the BM before the execution of steps 812 to S14.
If P (BMPold) does not match 0 indicating the first block in BML2, it is the block indicated by BMP-1, and if it matches, it is the block indicated by BMP IaX (last block). .

After completing step S15, the stack management mechanism 11 determines whether the number of valid blocks in 8M12 is less than the second predetermined number and whether or not there is a valid stack frame in stack 22. Here, the second predetermined number is the number of blocks that 8M12 has, and therefore, if step 315 is performed, the number will definitely fall below the second predetermined number, so there is no need to make a determination regarding this point. Therefore, of the above two types of determination, only the determination of whether or not a valid stack frame exists in the stack 21 is performed based on, for example, whether or not the stack pointer SP2 of the SP2 register 15 is larger than SPorg. (Step 816). if,
If SF3 is larger than SPorg, i.e. stack 21
If there is a valid stack frame in the stack 21, the stack management mechanism 11 returns the stack pointer SP2 of the SP2 register 15 to specify the latest valid stack frame in the stack 21, and then returns the stack pointer SP2 in the stack 2■ pointed to by this new SF3. The contents of the stack frame (the latest valid stack frame) are internally held in step Sll.
Transfer to the block in 8M12 pointed to by M P old (old BMP) and end the process for the stack access (read) request (steps S17 and S18).
). On the other hand, if the determination in step S1B is No (if there is no valid stack frame in the stack 21), the stack management mechanism 11 directly ends the processing for the stack access (read) request.

In the above, each time one stack access request is executed, the stack pointer SPI, block memory pointer B
Although the case where MP is updated has been described, it can also be applied to cases where writing/reading is repeated for one stack frame, such as in local variable processing.

Further, in the embodiment, in addition to the stack pointer SPI used for the stack management, the stack pointer S
Although the explanation has been made assuming that cache memory control dedicated to the stack data structure is performed by providing P2 and block memory pointer BMP, SF3. The functions required for BMP can be realized based on SP1 and the number of blocks of 8M12.

[Effects of the Invention] As described in detail above, according to the present invention, the following effects can be achieved.

■ Gash memory dedicated to a new stack data structure that can take full advantage of the features of stack access (
Since stack access is performed for block memory), processing speed is improved.

(2) In stack write access, no bus access for writing to the main memory occurs, so the overhead especially when trying to perform stack read access immediately after stack write access is eliminated.

■ The block to be transferred (evicted) from block memory to main memory is the oldest valid block at that time, so a stack access to reference the data is generated while the data in this block is being transferred. There is no risk that this will occur, and therefore the above transfer can be performed during bus free time, and there is almost no memory access overhead caused by this transfer.

■ Block data transferred (evicted) from block memory to main memory is returned to block memory before it is referenced, and when data is referenced, it becomes the latest block data, so block memory is targeted. You can refer to the data as follows.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a flowchart for explaining the operation. ■1... Stack management mechanism, 12... Block memory (BM), 13... Block memory pointer register (BMP register), 14... Stack pointer register (SPi register), 15... Stack Pointer register (S P2 register), 20... Main memory, 21... Stack. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2

Claims (1)

[Claims] A circular buffer type block memory consisting of a plurality of blocks associated with the stack frame of the stack for storing data to be stored in the stack reserved in the main memory instead of the same stack, and a block memory of the above-mentioned block in response to a stack write request. a block memory writing means for writing data to a block next to the latest valid block in the memory, and when the number of valid blocks in the block memory reaches a first predetermined number due to writing by the block memory writing means; a first transfer means for transferring the contents of the oldest valid block in the block memory to the main memory and stacking it on the stack; and a first transfer means for reading data from the latest valid block in the block memory in response to a stack read request. If the number of valid blocks in the block memory becomes less than a second predetermined number due to reading by the block memory reading means and there is a valid stack frame in the stack, the latest valid stack frame is read. and a second transfer means for transferring the contents of the frame to the block memory and writing it to the block immediately before the oldest valid block in the memory, and transferring the block memory to the cache memory in response to the stack write or read request. A cache control method for a stack data structure, characterized in that it is accessed as a stack data structure.