JPS5894182A - Buffer memory managing system - Google Patents

Abstract

PURPOSE:To improve hit rate, by changing a vacant page flag into vacancy for a page to be ineffective based on the restriction of scope, and selecting a page swept out of a buffer memory based on the vacant page flag and then page replacement managing information. CONSTITUTION:In a buffer memory management device 44, a vacant page flag 52, an address 53 in a main storage device, page replacement managing information 54, a lexical level 55, storage area for data effective/ineffective flag 56 determined based on the scope restriction are provided in corresponding with pages. If a data requested from an operating device 41 does not exist in a buffer memory 42, a page to be read newly is selected in the order of the flag 52, the flag 56 and the information 54. Thus, the hit rate can be improved and the effectiveness of the buffer memory can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buffer memory management method that aims to improve the hit rate by taking scope regulations into consideration.

In order to efficiently operate an arithmetic unit that operates at a higher speed than a main memory, a high-speed memory (buffer memory) is usually provided between the two. If the data requested by the arithmetic unit during program execution does not exist in the buffer memory, the arithmetic unit will not have to wait until the data is transferred from the main memory to the buffer memory. is not used effectively. Therefore, the main technical issue in the buffer memory control system is how to improve the probability (hit rate) that referenced data in the main memory exists in the buffer memory.

In the conventional general buffer memory control method, the main memory 5 and the buffer memory 2 are divided into pages of the same size, as shown in FIG.
A buffer memory management system that holds an empty page flag 9 corresponding to each page and indicating whether or not that page is empty, an address 10 in the main storage device of data stored in a page that is not empty, and page replacement management information 11. A device 4 is installed. The free page flag 9 is initialized to "free", and when data is subsequently stored from the main storage device 3 via the data bus 6, a flag indicating "not free" is set for this data storage page. When the arithmetic unit f1 requests data via the address bus 7 and the data transfer control bus 13, if the requested data exists in the buffer memory 2, the data is transferred to the buffer based on the command on the buffer memory control bus 12. The data is transferred from the memory 2 to the arithmetic unit 1 via the data bus 5.

On the other hand, if the data requested by the arithmetic unit 1 is not in the buffer memory 2, the address δ,
The page containing the requested data specified on 8 is transferred from the main memory 3 via the data bus 6 to an empty page in the buffer memory 2, and then the data is transferred based on the command on the pack memory control bus 12. Computing device 1 via bus 5
will be forwarded to. When there are no free pages in the buffer memory 2, one of the pages that is not free is selected based on the page replacement management information 11, the data of this page is flushed from the buffer memory 2, and the requested data is transferred to the main memory. It is necessary to read this page from the device 5.

In this way, as a conventional method for managing page replacement for buffer memory that has no free pages,
The order of pages stored in the buffer memory is held in the buffer memory management device as page replacement management information, and a FIFO (F
, 1rpt In First 0ut) method, and the LRU (Leap RaeaStl) method, which retains the time referenced by the computing device as page replacement management information and purges the page whose last reference time is the earliest based on this information.
y Upad) method, etc., but the hit rate mentioned above depends on these page replacement management methods.

In recent years, high-level languages have become popular for writing programs to be executed on arithmetic devices, and it has become more common for data to have ``scope restrictions'' as described below. A program written in a high-level language generally has a nested round bar structure as shown in Figure 2, and each frame has the number of surrounding frames ([lexical level (laaeiel je
It is called ``wel''. ) is characterized by In the example of FIG. 2, the lexical level of each frame A to G is 0 for frame A, 1 for frames B, D, and F, and 2 for frames C, E, and G. These frames consist of declarative statements (data generation) and executable statements (data references, lexical level changes). Data declared in a certain frame is valid only within that frame, and data that can be referenced by an executable statement in a certain frame is limited to data declared within the frame surrounding that frame. In other words, in the example shown in Figure 2, the data that can be referenced by the executable statement in frame C is declared in each of frames A, E, and C, and only the nine data a, b, and C are the data that can be referenced by the executable statement in frame B. is frame A
and B, respectively, and the only data that can be referenced by the executable statement in frame A is α.

This restriction of the range of data that can be referenced by an executable statement within a certain frame is called scope (Ie#Pa) regulation.

However, the conventional page replacement management method is performed completely independently of the above-mentioned scope regulation, which causes a decrease in the hit rate. For example, when execution moves from frame to frame C in Figure 2, data d remains in the buffer memory for the longest time compared to other pages in the LRU method, even though it is no longer valid. This causes the hit rate to decrease.

The present invention has been made in view of the above-mentioned conventional problems, and its purpose is to manage buffer memory to improve the hit rate by managing page replacement in consideration of scope regulations. The goal is to provide a method.

Before explaining the present invention in detail, first, an executable statement for changing the lexical level will be explained. There are four types of this:

This is an executable statement that increases the value of the lexical level by 1, such as the PL/I DO statement. In the example of FIG. 2, this applies to changes from frame A to frame B and from frame B to frame C, but there is no data that becomes invalid based on scope regulations.

Type 2 is an executable statement that decreases the value of the lexical level by 1, and is used in combination with a type 1 executable statement. For example, P
This corresponds to the END statement corresponding to the L/I DO statement.

In the example of FIG. 2, this applies to changes from frame B to frame A and from frame C to frame B, and the data declared within the frame before the change becomes invalid based on scope regulations.

Type 3 An executable statement that changes the value of the lexical level to a specified value less than or equal to (current value + 1), such as C in PL/I.
This applies to the ALL statement. In the example in Figure 2, this applies to changing from frame C to frame and from frame E to frame F.
Existing data (data C9# and g in this example) that had a lexical level equal to or higher than the changed lexical level value (1 in this example) is invalidated due to scope regulation.

Type 4 An executable statement that restores the lexical level changed by a type 3 executable statement, and is used in pair with a type 3 executable statement. For example, the pyrORETURN statement corresponds to this, and in the example in Figure 2, changing from frame to frame C or from frame F to frame E
This applies to changes to.

This executable statement invalidates all the data declared at the lexical level before restoration (in this example, data d and f), while the data that was invalidated by the type 3 executable statement ( In this example, data C and -) become valid again.

FIG. 3 is a block diagram showing an example of the configuration of a buffer memory system used in an embodiment of the present invention.
is an arithmetic unit, 42- is a buffer memory, 45 is a main storage device, 44 is a backup memory management device, 45 and 46 are data buses, 47.48 and 51 are control buses, 49.58
is the address bus. (Rahua memory management device 44
In addition to the empty page flag 52, main memory address 55, and page replacement management information 54, which are the same as in the conventional method, there is also a lexical level 55 at which the data stored in that page is declared and a scope regulation. A storage area for the data valid/invalid flag 56 determined based on the data valid/invalid flag 56 is provided corresponding to each page in the rough memory 42, and a lexical level information bus 50 is provided between the arithmetic unit 41 and the buffer memory management device 440. Note that the page replacement management information 54 may be information based on any known method such as the FIFO method or LRU method described above.

In addition, all free page flags are initially set to "free".

First, the operation when the arithmetic unit 41 executes the above-mentioned four types of executable statements that change the lexical level will be described.

When the arithmetic unit 41 executes the above-mentioned type 1 executable statement, there is no data in the buffer memory 42 that becomes invalid based on the scope regulation, so the empty page 72 and the data valid/invalid flag are 56 is not changed at all. The same is true when an executable statement that does not involve changing the lexical level is executed.

When the arithmetic unit 41 executes the above-mentioned type 2 executable statement, the arithmetic unit 41 indicates that it is executing the type 2 executable statement via the control bus 48 and that it is in the process of executing the type 2 executable statement via the lexical level information bus 50. The lexical level 111 whose data in the memory 42 is to be invalidated is transferred to the pack memory management device 44. Upon receiving this, the buffer memory management device 44 determines that the free page flag 52 is "not free".
Compare the lexical level of all pages whose data valid/invalid flag is “valid” with the specified value ■1, and set the free page 7 lag to all matching pages. 52 is changed to "vacant". In the example in Figure 2, in the case of an executable statement that changes frame C to frame B, a value of 2 is transferred from the arithmetic unit [41] as 111, and the page containing data C in frame C whose lexical level is 2 is is changed to "vacant". In addition, data in other frames E and G whose lexical level is 2 and g
has already been invalidated or swept out before the change from frame C to frame B due to the general nature of the program.

When the arithmetic unit 41 executes a type 5 executable statement, the arithmetic unit 41 indicates via the control bus 48 that it is executing a type 3 executable statement and via the lexical level information bus 50 the data to be invalidated. The minimum value 1112 of the lexical level of is transferred to the buffer memory management device 44.

Upon receiving this, the buffer memory management device 44 displays that the free page flag 52 is "not free" and the lexical level 55 is equal to or larger than the specified value 11112, and the buffer memory management device 44 sends data to all pages whose free page flag 52 is "not free" and whose lexical level 55 is equal to or larger than the specified value 11112. Set the valid/invalid flag to “invalid”. In the example in Figure 2, in the case of a type 3 executable statement that changes frame C to a frame, 11
At step 112, the data valid/invalid flag is set to "invalid" by the arithmetic unit 41 for the page having the data C in the frame C whose Pat7Amel level is 2. As in the case of type 2 executable statements, the data in other frames whose lexical level is 2 and g are changed from round bar C to frame due to the general nature of the program 2 system. It has already been invalidated or swept away before.

When the arithmetic unit 41 executes a type 4 executable statement, the arithmetic unit 41 indicates via the control bus 48 that it is executing a type 4 executable statement and via the lexical level information bus 50 the data to be invalidated. The lexical level ItB of
Buff candy%lJ'! The data is transferred to the management device 44. Upon receiving this, the buffer memory management device 44 designates the lexical level 55 for all pages for which "not free" is displayed in the free page flag 52 and "valid" is displayed in the data valid/invalid flag 56. value ft1
t5 is compared, and the empty page 7 jig 52 is set to "empty" for all matching pages. In the example in Figure 2,
In the case of a type 4 executable statement that changes the frame to frame C, a value of 1 is transferred from the arithmetic unit 41 as 4415, and the page containing data d in the frame with a lexical level equal to this value is marked as "free". ' will be changed to '. Note that, as in the case of type 2 executable statements, the lexical level is 1"t'
Due to the general nature of the program, the data b and f in the other frames have already been invalidated or swept out before the change from the above frame to frame C.

Next, the operation when the arithmetic unit 41 executes an executable statement that refers to data will be described.

When the arithmetic unit 41 executes an executable statement that reads data,
The arithmetic unit 41 transfers the information that data is being read via the control bus 48, the data address adr1 via the address bus 49, and the lexical level 4 of the data via the lexical level information hash 50. The pants management device 44 that has managed this compares the address 55 in the main storage device with the address αdr1 of the designated data for all pages whose empty page flag 52 indicates "not empty." If it is found that the data requested from the arithmetic unit 41 exists in the buffer memory 42 based on the coincidence of the comparative results, the buffer memory 42 is controlled via the control bus 47 and the data requested from the arithmetic unit 41 is requested from there. The data is transferred and the lexical level received and held from the arithmetic unit 41 is erased.

On the other hand, if it is found that the data requested by the arithmetic device 41 is not in the backup memory 42, the buffer memory management device 44 first reads the page containing the requested data from the main storage device 45. The buffer memory 420 page to be read is selected according to the following priority order. First, search for a page with "Empty" displayed on the empty page 72g 52, and if it exists, select it. If an "empty" page does not exist, a page with "invalid" displayed in the data valid/invalid 7 lag 56 is searched for, and if it exists, it is selected. When there is no "invalid" page, a page to be newly read is selected based on page replacement management information 54 configured according to any conventional method such as the LRU method.

After selecting the page in this way, the memory management unit 44 is connected to the address bus 58 and the control bus 4.
The backup memory 42 and the main memory 43 are controlled via the data buses 7 and 51, respectively, and the page containing the requested data is transferred from the main memory 45 to the selected page of the backup memory 42 via the data bus 46. transfer to. Next, the buffer memory management unit [44] sets the free page flag 52 to "not free" for the page transferred into the buffer memory 42, and sets the main memory address 53 of the transferred page to the main memory address 53. The internal address is set, the lexical level 55 is set to H4, and the data valid/invalid flag 56 is set to "valid". Finally, the buffer memory management device 44 causes the requested data to be transferred to the arithmetic device 41 via the data node 45.

Next, the operation when the arithmetic unit 41 executes an executable statement for writing data will be described.

When the arithmetic unit 41 executes an executable statement to write data,
The arithmetic unit 41 transfers data to the buffer memory 45 via the data bus 45, and simultaneously transfers data to the control bus 48 and address bus 4t? The information indicating that data is being written and the address adr2 of the data are transferred to the backup memory management device 44 via the memory management device 44, respectively. Upon receiving this, the backup memory management device 44 checks the address 55 in the main storage device and the address αdr of all pages whose free page flag 52 indicates "not free".
Compare 2. Only when it is determined that the page is present in the buffer memory 42 based on a match between the comparison results, the buffer memory management device controls the buffer memory 42 via the control bus 47 to write the data to the page. Let it happen.

Next, the backup memory management device 44 controls each of the buffer memory 42 and main storage device 43 to write via the address bus 58 and control buses 47 and 51, regardless of whether or not there is writing on the buffer memory. The data to be stored is transferred via the data bus 46, and the data is written to the address adr2 of the main storage device 46. In this way, the data write operation in this embodiment is almost the same as in the conventional example.

In the above embodiment, instead of flushing out all data invalidated due to scope regulation from the backup memory, data invalidated by a type 3 executable statement is written to a subsequent type 4 executable statement. Considering the possibility that the data will be used again, the data valid/invalid flag is set to invalid, and when the arithmetic unit requests data, the data with the above-mentioned "invalid" flag is also searched. It is said that Although such a configuration can be expected to improve the hit rate, it also has the disadvantage of increasing overhead for selecting pages to be flushed out.

9. From the standpoint of reducing such overhead, we have completely removed the data valid/invalid flag in the system shown in Figure 6, and the type 2 executable statement has become invalid for the type 6 executable statement. Similarly to data that has become invalid due to an executable statement, it is also possible to have a configuration in which all data is flushed out from the backup memory. Of course, in this configuration, only pages for which "not free" is displayed in the free page flag are searched for presence or absence in the backup memory.

Alternatively, as a compromise between the above two methods, an area 57 for storing a 1-bit selection flag is provided in the buffer memory management device 44 in the configuration shown in FIG. Perform an operation using the data valid/invalid flag, while this selection flag is IO''
In this case, the configuration may be such that an operation is performed that ignores the data valid/invalid flag. This configuration has the advantage that it is possible to balance the hit rate and overhead by flexibly changing the selection flag according to the dynamic characteristics of the program executed by the arithmetic unit.

Furthermore, when changing the frame to frame C in a type 4 executable statement (Figure 2), there is also the problem that data b in frame B, which should become valid again, is also invalidated or wiped out.
For example, for type 4 executable statements, the configuration re-enables data invalidated by type 3 executable statements, that is, for pages that become invalid due to type 3 execution based on Sysscope regulations, the order of type 3 executable statements It is also possible to have a configuration in which data that has been invalidated by the most recently executed type 5 executable statement in the type 4 executable statement is made valid again.

As explained in detail above, the present invention changes the free page flag to "free" for some or all of the pages that are invalidated based on scope regulations, and when selecting pages to be flushed from the buffer memory, first Since this is first performed based on the free page flag and finally based on conventionally known appropriate page replacement management information, the hit rate is improved compared to the conventional method, and the usability of the buffer memory is further increased. I can do it.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a system to which the conventional method is applied.
FIG. 2 is a conceptual diagram for explaining scope regulation, and FIG. 3 is a block diagram of a system to which an embodiment of the present invention is applied. 41-...Arithmetic unit, 42...Buffer memory, 4
5... Main storage device, 44... Backup memory management device, 45° 46... Data bus, 47, 48.51
-...Control bus, 49.58...Address bus, 50
- Lexical level information bus, 52... Empty page flag, 55... Address in main memory, 54...
...Page replacement management information, 55...Lexical level, 56...Data valid/m effect 7 lag, 57...
- Selection flag. Patent applicant: 1 person outside of Fuji Electric Manufacturing Co., Ltd. Representative: 5 people outside of the office

Claims (1)

[Claims] 1. Backup memory management information including free page flags, addresses in the main memory, lexical levels, and appropriate page replacement management information is stored in the buffer memory management device for each page in the buffer memory, and the arithmetic unit stores the lexical When executing an executable statement that changes the level, the type and lexical level of this executable statement are transferred to the buffer memory management device, and the buffer memory management device that receives this transfers some or all of the pages that are invalidated based on scope regulations. When the free page flag is changed to "free" and the arithmetic unit executes an executable statement to read data, if the page containing this data does not exist in the backup memory, the buffer memory management unit first A buffer memory management method characterized in that, based on an empty page flag, a page in the buffer memory is finally selected for page replacement based on the appropriate page replacement management information.