JPH0123944B2 - - Google Patents

Info

Publication number
JPH0123944B2
JPH0123944B2 JP57004725A JP472582A JPH0123944B2 JP H0123944 B2 JPH0123944 B2 JP H0123944B2 JP 57004725 A JP57004725 A JP 57004725A JP 472582 A JP472582 A JP 472582A JP H0123944 B2 JPH0123944 B2 JP H0123944B2
Authority
JP
Japan
Prior art keywords
film
mask
layer
patterned
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57004725A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58122750A (ja
Inventor
Masuyuki Taki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP472582A priority Critical patent/JPS58122750A/ja
Publication of JPS58122750A publication Critical patent/JPS58122750A/ja
Publication of JPH0123944B2 publication Critical patent/JPH0123944B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP472582A 1982-01-14 1982-01-14 半導体装置の製造方法 Granted JPS58122750A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP472582A JPS58122750A (ja) 1982-01-14 1982-01-14 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP472582A JPS58122750A (ja) 1982-01-14 1982-01-14 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58122750A JPS58122750A (ja) 1983-07-21
JPH0123944B2 true JPH0123944B2 (en, 2012) 1989-05-09

Family

ID=11591863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP472582A Granted JPS58122750A (ja) 1982-01-14 1982-01-14 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58122750A (en, 2012)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787349B2 (ja) * 1985-11-20 1995-09-20 富士通株式会社 デイジタル信号の歪補償回路
JPH03173430A (ja) * 1989-12-01 1991-07-26 Matsushita Electron Corp 配線の形成方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56122143A (en) * 1980-02-29 1981-09-25 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS58122750A (ja) 1983-07-21

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