JPH01230247A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To implement high integration density of an element, by forming a P-type stopper in a self-aligned P-type and N-type wells, e.g., the P-type well, by a self-aligning manner. CONSTITUTION:An Si oxide film 14 and an Si nitride film 15 are formed on an Si substrate 13. Thereafter, a window is formed. With resist 16 as a mask, an N-type well 17 is formed. After the resist 16 is removed, selective oxidation is performed with the film 15 as a mask, and an Si oxide film 18 is formed. Since the film 18 is formed by the selective oxidation, the surface of a well 17 is lower than the surface of the substrate 13 where the well 17 is not provided. Then, the film 15 is removed, and the Si oxide film beneath the film 15 is etched. Then an Si oxide film 19 remains at a part the selectively oxided. Then, with the film 19 as a mask, a P-type well 20 is formed. After an Si oxide film 21 is formed on the entire surface, a window is provided. With resist 22 and an Si oxide film 23 as masks, a P-type stopper is formed. Thus, the area of the well can be made small, and the high integration density of an element can be implemented.

Description

[Detailed description of the invention]

The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a stopper. A conventional stopper manufacturing method is shown and explained in FIG. In FIG. 1(a), a silicon oxide film 2 is formed on a silicon substrate 1, a window is opened for forming an N-type well, and a resist 3 is formed on a silicon substrate 1.
The N-type well 4 is formed by ion implantation using as a mask. After removing the resist 3, a silicon oxide film 5 is formed on the entire surface as shown in FIG. 1(b). After forming a P-type well 8 as shown in FIG. 1(C) using the same process as that for forming an N-type well, a silicon oxide film 9 is formed as shown in FIG. 1(d).
is formed on the entire surface. Finally, open a window for forming a P-type stopper and use resist 11 as a mask as shown in Figure 1 (e).
) The P-type stopper 12 is formed as shown in FIG. In such conventional manufacturing methods, each well and stopper had to be formed with a margin due to mask misalignment and the like. This is extremely inconvenient in achieving a high integration ratio of elements. The present invention improves the above drawbacks. An object of the present invention is to achieve high integration of devices by forming a P-type stopper in a self-aligned manner within a P-type well of a self-aligned P-type and N-type well. There it is. An embodiment of the present invention will be described with reference to FIG. In FIG. 2(a), a silicon oxide film 14 is formed on a silicon substrate 13.
After forming the silicon nitride film 15, a window for forming an N-type well is opened, and the N-type well 17 is formed by ion implantation using the resist 16 as a mask. resist 1
After peeling off the silicon oxide film 18, selective oxidation was performed using the silicon nitride film 15 as a mask to form a silicon oxide film 18.
It is figure (b). Next, as shown in FIG. 2(C), silicon nitride It! 1115
When the silicon oxide film 19 is removed and the underlying silicon oxide film is etched, a silicon oxide film 19 remains in the selectively oxidized area. A P-type well 20 is formed by ion implantation using the silicon oxide film 19 as a mask. Furthermore, after forming a silicon oxide film 21 on the entire surface as shown in FIG. 2(d), as shown in FIG.
A window for forming a P-type stopper is opened as shown in FIG.
A P-type stopper 24 is formed. According to the manufacturing method according to the present invention explained above, each P is self-aligned.
Furthermore, since the P-type stopper is formed in self-alignment in the type and N-type wells, it is no longer necessary to provide a margin for mask misalignment, etc., and as a result, the area of the well can be reduced to
It can be made 30% smaller. As described above, the present invention aims at high integration of elements.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a conventional method of forming a stopper, and FIG. 2 is a diagram showing a method of forming a stopper according to the present invention. 13... Silicon substrate 14.18, 19, 21.23... Silicon oxide film 15... Silicon nitride film 16.22... Resist 17... N type well 20... P type well 24 ...P type stone bar or above Applicant Seiko Epson Co., Ltd. agent Patent attorney Masayoshi Kamiyanagi and one other person Voluntary writing of amendments to the procedures in Figure 1 Figure 2) 1. Display of the case 7-2, - Patent application filed on January 13, 1999 (6) 2, Name of the invention Semiconductor device 3, Relationship to the amended person case Applicant 2-4-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo (236) Seiko Epson Corporation Representative Director Tsuneya Nakamura Contact information 6348-8531 Extension 300-3025,
Description Subject to Amendment (Full Text Amendment) Description 1, Name of the Invention Semiconductor Device 2, Claims 3. Detailed Description of the Invention The present invention relates to a semiconductor device, and particularly relates to semiconductor devices formed in a self-aligned manner with each other. The present invention relates to a structure of a semiconductor device having a P-type well, an N-type well, and a stopper. A conventional method for manufacturing a stopper will be described with reference to FIGS. 1(a) to 1(e). In Fig. 1, 1 is a silicon substrate, 2°5.
6, 9.10 are silicon oxide films, 3, 7.11 are resists, 4 is an N-type well, 8 is a P-type well, and 12 is a P-type stopper. In FIG. 1(a), a silicon oxide film 2 is formed on a silicon substrate 1, a window for forming an N-type well is opened, and the N-type well 4 is formed by ion implantation using a resist 3 as a mask. After removing the resist 3, a silicon oxide film 5 is formed on the entire surface as shown in FIG. 1(b). N
After a P-type well 8 is formed as shown in FIG. 1(C) using the same process as that for forming a type well, a silicon oxide film 9 is formed on the entire surface as shown in FIG. 1(d). Finally, a window for forming a P-type stopper is opened, and the P-type stopper 12 is formed using the resist 11 as a mask as shown in FIG. 1(e). In such a conventional manufacturing method, each elbow and stopper had to be formed with a margin due to mask misalignment, etc. This is very inconvenient in achieving high integration of elements. The present invention improves the above drawbacks. An object of the present invention is to achieve high integration of devices by forming a P-type stopper in a self-aligned manner, for example, within a P-type well of self-aligned P-type and N-type wells. The purpose of this invention is to provide a structure of a semiconductor device that can perform the following steps. An embodiment of the present invention will be described with reference to FIGS. 2(a) to (e). In Figure 2, 13 is a silicon substrate, 14.18.1
9, 21, and 23 are silicon oxide films, 15 is a silicon nitride film, 16, 22 is a resist, 17 is an N-type well, 20 is a P-type well, and 24 is a P-type stopper. Figure 2 (a
) After forming a silicon oxide film 14 and a silicon nitride film 15 on a silicon substrate 13, a window for forming an N-type well is opened, and the N-type well 17 is formed by ion implantation using a resist 16 as a mask. After removing the resist 16, selective oxidation was performed using the silicon nitride film 15 as a mask to form a silicon oxide film 18, as shown in FIG. 2(b). Here, since the silicon oxide film 18 was formed by selective oxidation, the surface of the N-type well 17 is
The surface of the silicon substrate 13 is lower than the surface of the silicon substrate 13 where no surface is present. This is a structural feature of this embodiment. Next, as shown in FIG. 2C, the silicon nitride film 15 is removed and the underlying silicon oxide film is etched, leaving a silicon oxide film 19 in the selectively oxidized area. The P-type well 2 is formed by ion implantation using the silicon oxide film 19 as a mask.
form 0. Furthermore, after forming a silicon oxide film 21 on the entire surface as shown in FIG. 2(d), a window for forming a P-type stopper is opened as shown in FIG. 2(e), and the resist 22 and silicon oxide film 23 are masked. The P-type stopper 24 is formed as follows. According to the method for manufacturing a semiconductor device according to the present embodiment described above, each P is self-aligned.
Furthermore, since the P-type stopper is formed in self-alignment in the type and N-type wells, it is no longer necessary to provide a margin for mask misalignment, etc., and as a result, the area of the well can be reduced to
It can be made 30% smaller. As described above, the features of the present invention include a first conductivity type well region whose surface is lower than the surface of the silicon substrate in other regions;
formed in a conductive type well region in self-alignment,
A second conductivity type well region having a surface higher than the surface of the conductivity type well region, and a second conductivity type stopper region formed in the second conductivity type well region in self-alignment with the first conductivity type well region. This is the structure of a semiconductor device having the following structure. Further, the present invention provides an element by forming, for example, a gate electrode, a source region, a drain region, and various wirings by a conventionally well-known method after forming a well region and a stopper region as described above. However, it is omitted here. As described above, the present invention provides a semiconductor device having a structure in which elements are highly integrated.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a conventional method for manufacturing a semiconductor device.
FIG. 2 is a diagram showing a method of manufacturing a semiconductor device according to the present invention. 1.13... Silicon substrate 2.5, 6, 9, 10, 14, 18° 19.21.23... Silicon oxide film 15... Silicon nitride film 3.7, 11.16.22. ...Resist 4.17...
・N type well 8.20...P type well 12.24...P type stopper or more

Claims (1)

[Claims] A step of forming a silicon oxide film and a silicon nitride film on the silicon substrate in forming a stopper for a semiconductor integrated circuit in which a well of the same type and a well of the opposite type with a higher concentration than the silicon substrate are formed in the silicon substrate. forming a selective oxide film on the N-type well using the silicon nitride film as a mask; After removing the film, there is a step of forming a P-type well using the selective oxide film as a mask, and then oxidizing the entire surface to open a window for forming a P-type stopper, and then using the resist and the selective oxide film as a mask to form a P-type well. A method for manufacturing a semiconductor device, comprising the step of forming a mold stopper.