JPS63313866A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To decrease the number of photomasks required for manufacture by executing a photoetching process aiming at the formation of different patterns as a contact hole and an opening section in the upper section of a PAD by using the same photomask. CONSTITUTION:A MOS transistor is formed, and an inter-layer insulating film 108 is shaped onto the whole surface of a wafer substrate. The whole surface of the wafer substrate is spin-coated with a photoresists 109, and the photoresists in a contact hole and a section, to which a PAD shaped, are removed through exposure and development by employing a photomask. The inter-layer insulation film is etched, the photoresist 109 is gotten rid of, and the contact hole 110 is formed. A source electrode 111, a drain electrode 112 and a PAD 113 are shaped, a passivation film 114 and a photoresist 115 are formed to the whole surface of the wafer substrate, and exposure and development are conducted by using the photomask employed at the time of the formation of the contact hole 110. Accordingly, the number of the photomasks is decreased.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

A conventional method for manufacturing a semiconductor device will be explained using FIGS. 2(a) to 2(d), taking a semiconductor device including an N-channel silicon gate field effect transistor as an example.

First, as shown in FIG. 1(a), an N-type semiconductor substrate 201
A part is made into a PWELL by ion implantation, and an oxide film 203 is formed in the other part by photoetching the Si, Na film and selective oxidation technique.

Next, as shown in FIG. 2(b), after forming a gate insulating film 204 on the PWELL, polycrystalline silicon is applied to the entire surface of the wafer.
Alternatively, after forming the metal compound alloy (silicide), photoetching is performed to form the gate electrode 205. Then, a gate electrode is formed by masking a source region 206 and a drain region 207 by ion implantation or the like.

Next, as shown in FIG. 2C, an interlayer insulating film 208 is formed over the entire surface of the wafer substrate, and then contact holes 209 are formed by photoetching. Next, a conductive wiring layer is formed on the entire surface of the wafer substrate, and the source electrode 2 is etched by photo-etching.
10. The drain electrode 211, the PAD 212, and the wiring connecting them are formed by photoetching.

Next, as shown in FIG. 2(d), a passivation film 213 made of an insulating material is formed on the entire surface of the Urchin Δ1 substrate, and then an opening 214 is formed in the PADl by photoetching.

A semiconductor device is completed through the above steps.

[Problem that the invention seeks to solve]

As mentioned above, the manufacture of semiconductor devices largely involves repeating the formation of thin films made of insulating or conductive materials and the photo-etching process.

However, in the conventional technology described above, each photoetching process is performed using a different photomask, so the cost required for creating and managing the photomasks is enormous, and as a result, it is difficult to manufacture semiconductor devices at low cost. It is.

The present invention solves the problems in the conventional semiconductor device manufacturing method, and its purpose is to provide a semiconductor device with the same performance as the conventional method at a lower cost.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention is characterized in that exposure and development are performed using the same photomask in two or more photoetching steps aimed at forming different patterns.

〔Example〕

FIGS. 1(a) to 1(f) are cross-sectional views according to the manufacturing process of a semiconductor device according to an embodiment of the present invention, in which the contact hole and the opening above the PAD are formed by a photoetching process using the same photomask. N-channel type MO
3) A semiconductor device including a transistor is illustrated.

The semiconductor device according to the embodiment of the present invention basically has the structure shown in FIG. 1(f). 101 is a semiconductor substrate, 1
02 is a PT diffusion layer, 103 is a silicon dioxide film, 104 is a gate insulating film, 1o5 is a gate electrode, 106 is a source region, 107 is a drain region, 108 is an interlayer insulating film, 110
111 is a contact hole, 111 is a source electrode, 112 is a drain region, 113 is a PADl, 114 is a passivation film, and 116 is an opening in the PADl.

This will be explained in detail below.

First, as shown in FIG. 1(a), a PT diffusion layer 102 and a silicon dioxide film 103 are formed on an N-type semiconductor substrate 101 by a well-known method.
, a gate insulating film 104, a gate electrode 105, a source region 106, a drain region 107, etc. are formed to form a MOS transistor, and an interlayer insulation M1 is further formed over the entire surface of the wafer substrate.
Form 08.

Next, as shown in FIG. 1(b), a photoresist 109 is spin-coated over the entire surface of the wafer substrate, exposed to light using a photomask, and developed to remove the photoresist 7 in the area where contact holes and PADs are to be formed. do.

Next, as shown in FIG. 1(c), after etching the interlayer insulating film, the photoresist 109 is removed and the contact hole 1 is etched.
form 10. At this time, a portion of the silicon dioxide film 103 where the PAD is to be formed is also etched, but the etching does not reach the semiconductor substrate 101 because there is a margin in the film thickness.

Next, the source electrode 111, the drain electrode 112, the PAD1
After forming 13, a badge-containing film 114 and a photoresist 115 are formed on the entire surface of the substrate, exposed to light using the photomask used when forming the contact hole 110, and developed.

Then, as shown in FIG. 1(d), the photoresist on the source and drain electrodes 111 and 112 and on the PAD 113 is removed.

Next, the wafer substrate is heated to about 1509C to 300'C. Then, the photoresist 115 is deformed by exceeding its glass transition point, and the source and drain electrodes are covered with the photoresist again. However, since the photoresist pattern formed on the PADl is larger than the pattern on the electrode, the shape of the photoresist does not change much. (On the contrary, the photoresist recedes and the pattern becomes larger.) Therefore, as shown in Fig. 1(e'), P
The photoresist is removed only on the AD 113.

Next, the wafer shown in FIG. 1(e) is etched and the photoresist 115 is removed, and the shape is shown in FIG. 1(f). By performing photoetching using the same photomask used to form the contact hole 110, a semiconductor device having an opening 116 only on the PADIIs is formed.

〔Effect of the invention〕

As described above, according to the present invention, the photo process for forming different patterns such as the contact hole and the opening at the top of the PAD is performed using the same photomask, thereby improving the production of semiconductor devices. It becomes possible to reduce the number of photomasks required.

If the photomask is also used, an unintended pattern may be etched.

When a resist is heated to a high temperature, it deforms by exceeding its glass transition point, making it impossible to form fine patterns.

Therefore, when forming patterns with greatly different dimensions, such as a contact hole and a PAD, the smaller pattern is not etched, and the influence on the semiconductor device can be minimized.

[Brief explanation of drawings]

FIGS. 1(a) to 1(f) are cross-sectional views of the manufacturing process of a semiconductor device according to an embodiment of the present invention. FIGS. 2(a) to 2(d) are cross-sectional views of conventional semiconductor device manufacturing steps. 101...N-type semiconductor substrate 102...PT diffusion layer 103...Silicon dioxide film 104...Gate insulating film 105...Gate electrode 106...Source region 107...Drain region 108...・Interlayer insulating film 109...Photoresist 110...Contact hole 111...Source electrode 112...Drain electrode 113...PAD 114...Badge grade 9 film 115...Photoresist 116... - Opening portion on PAD 201...N-type semiconductor substrate, 202...PT diffusion layer 203...Silicon dioxide layer 204...Gate insulating film 205...Gate electrode 206...Source region 207 . . . Drain region 208 . . Interlayer insulating film 209 . . . Contact hole 210 . Above the opening

Claims (1)

[Claims] a) In two photo steps for the purpose of forming resist patterns, each having different dimensions, exposure and development are performed using one photomask having both patterns, so that the resist layer has the same pattern. In the step of forming a pattern and b) the photo-etching step of forming a pattern with large dimensions, the patterned resist layer is heat-treated at a high temperature. 1. A method of manufacturing a semiconductor device, comprising: erasing a resist pattern with a small size and then etching it to form only a pattern with a large size on a layer to be etched.