JPS6059755A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate an improper etching of wirings such as a disconnection by selectively oxidizing except the portions to be polycrystalline silicon electrodes and wirings of a polycrystalline silicon film, and burying the polycrystalline silicon electrode and wirings in the oxidized silicon film. CONSTITUTION:An oxidation resistant film 10 such as nitrided silicon film is formed on a polycrystalline silicon film 5, the film 10 on the portions to become polycrystalline silicon electrodes and wirings 5a is allowed to remain, and the other portions are removed by photoetching method. With the remaining oxidation resistant film 10 as a mask the film 5 is oxidized, and the film 5 except the polycrystalline silicon electrodes and wirings 5a of the prescribed pattern are formed to be oxidized silicon film 5a. Thus, since the polycrystalline silicon electrodes and wirings 5a are formed in the film 5b, a crest-shaped portion is not formed on a metal film 7. Accordingly, the fact that the thickness of a resist film 8 formed thereon is reduced to cause a pinhole can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of Origin 1] The present invention relates to an improvement in a method for manufacturing a semiconductor device using a polycrystalline silicon film for electrodes, wiring, etc.

[Prior art]

In semiconductor devices, polycrystalline silicon is often used for electrodes or wiring.

FIG. 1 is a cross-sectional view of an example of a conventional 110S type silicon gate transistor. In Figure 1, +l) is a silicon substrate which is a semiconductor substrate, and (2) is a silicon substrate (+) in which an impurity of the conductivity type opposite to the conductivity type of the silicon substrate is introduced into the surface part of the silicon substrate (+). Two source/drain regions are provided with a predetermined interval fft between them, (3) is a source/train region (2) made of a silicon oxide film, etc.
an insulating film provided on the silicon substrate ill including the top;
(4a) is made of silicon oxide film etc. and has two sources.
A gate insulating film (5a
) is made of a polycrystalline silicon film with a thickness of 20 to 10,000 wafers, and is formed on the gate oxide layer (aa) to serve as a gate electrode, and extends from this gate electrode onto the insulating film (3) to form a polycrystalline silicon wiring. The polycrystalline 7-electrode arrangement) is an interlayer insulating film made of an oxidized 7-layer film, etc., formed over the insulating film 3 and the polycrystalline silicon electrode/wiring 5a. /a) is a contact hole formed in the interlayer insulating film (6) and the insulating layer 1) to the source/drain region (2) through the contact hole and the contact formed in the interlayer insulating film (6). This is a metal wiring bonded to the polycrystalline silicon wiring portion of the polycrystalline silicon electrode/contact KC' (5a,) through a hole.

To manufacture the above conventional 1.AO8 type silicon gate transistor, a metal film IJJ (7a
) To form a pattern, as shown in Figure 2, which is an enlarged cross-sectional view of a part of the wafer in that process, a photosensitive agent with a small viscosity is applied to the soil (7) for pattern creation. A resist film (8) having a thickness of about 5,000 to 20,000 layers is formed by rotating and connecting, and this resist film (8) is entirely formed into a predetermined pattern, and the entire resist film (8) is made into a mask using gold M II.
fN f7) to form a metal wiring in a predetermined pattern. In the above-mentioned conventional method, the metal film (7) that rides on the polycrystalline silicon electrode/wiring (5a) forms a mountain shape, so the resist film (8) on top of the metal film (8) is removed at one corner of the mountain shape [Fig. The film thickness of the part shown in (1)) is 50
00 A or less, and bin poles are likely to occur.
It could not withstand sufficiently as an etching mask for the metal blA f7), and etching defects such as disconnection of the metal wiring (7a) were likely to occur.

[Thoughts of invention ζ chivalry]

This invention was made for the purpose of eliminating the deficiencies listed in item 2 and oxidizes a polycrystalline silicon film formed on a semiconductor substrate with an insulating film interposed therebetween, except for the portions that will become polycrystalline silicon electrodes and wiring. By embedding the polycrystalline silicon electrodes and wiring into the silicon oxide film, the mountain-shaped portions of the metal wafer film formed on the polycrystalline silicon electrodes and wiring are eliminated. The present invention proposes a method for manufacturing semiconductor devices that prevents thin parts from forming in the resist film and uses this resist film as a complete mask to prevent etching defects such as disconnections in metal-group wiring. It is.

[Embodiments of the invention]

Hereinafter, this third aspect will be explained based on an example.

FIGS. 3(a) to 3(f) are cross-sectional views showing the main steps of an embodiment of the method for manufacturing a semiconductor device according to the present invention.

3, an insulating film (3) made of a silicon oxide film or the like is formed on a silicon substrate (2), as shown in FIG. 3(a). The insulating film on the surface of the silicon substrate (1) that is to become the source/drain region (2) and the area between them is removed, and a thin oxide film is applied on the silicon substrate (2) on the surface of the silicon substrate (1). An insulating film (4) made of a silicon film or the like on which a gate insulating film (4a) is to be formed is provided, and polycrystalline silicon l1ut'') is formed over the insulating film (3) and the insulating film (4).

Next, on the polycrystalline silicon film (5), a 1nhe oxidizing 11K film such as a silicon nitride film is formed, and a 1L film is formed on the portion of the polycrystalline silicon film (5) that is to become the polycrystalline silicon electrode/wiring (5a). The oxidation-resistant film (lO) is left behind, and the other parts of the oxidation-resistant film (lO) are removed by photolithography. At this time, the polycrystalline silicon film (5) under the oxidation-resistant film +1 (11) to be removed by etching may be etched, leaving a film thickness of at least %. As shown, the polycrystalline silicon film (5) is oxidized using the remaining oxidation-resistant film +IO+ as a mask, and 9F
The polycrystalline silicon film (5) other than the polycrystalline silicon electrode/wiring (5a) having a certain pattern is made into a silicon oxide film (5b). Thereafter, the oxidation-resistant film (10) that is no longer needed is removed. Next, when forming an MO8 type transistor, as shown in iJ3 figure (d), the silicon substrate f+)
The film (4) and the silicon oxide film (5b) on the surface area where the source train region (2) is to be formed are removed to form an opening, and the silicon substrate (tl) is passed through this opening. Source/drain regions (2) are formed by diffusing impurities of a conductivity type opposite to that of the silicon substrate (1). Next, as shown in FIG. 3(e),
An interlayer insulating film tG) made of a silicon oxide film or the like is formed over the source/drain region (2), the exposed surface of the insulating film (3), the polycrystalline silicon electrode/wiring (5a), and the silicon oxide film (5b). Form. Subsequently, as shown in FIG. 3(f), source/drain regions (2) and polycrystalline silicon electrodes are formed on the interlayer insulating film (6) by photolithography. 'i+(5a) polycrystalline silicon matrix &! Form a contact ball for the part. At this time, since the layer 1) Jj insulating film (6) above the polycrystalline silicon wiring is flat, it is easy to process the pattern 1Nll 71. Furthermore, a metal film is formed on the interlayer insulation film (6) on the source/drain region (2) and the portion exposed to the contact hole of the polycrystalline silicon electrode/wiring (5a). The main steps of the method of this embodiment are completed by forming one strip of metal into a metal wiring (7a) of a predetermined pattern using a military etching method.

FIG. 4 is an enlarged sectional view for explaining in detail the metal wiring forming step, which is the weak point of this invention. FIG. 4 shows the process of forming metal wiring for the polycrystalline silicon wiring IIM portion of the polycrystalline silicon electrode/wiring (5a). forming a metal film (7) over the exposed surface of the polycrystalline silicon iL jji/wiring (5a) and over the interlayer insulating film (6); A resist film (8) is formed on this gold film (7), this resist film (8) is formed into a regular pattern of ivy, and the metal film (7) is etched using the resist film (8) as a mask. In the method of the embodiment in which (7) is made into metal wiring in a predetermined pattern, unlike the conventional method shown in FIG.
The polycrystalline silicon electrode/wiring (5a) is made of silicon oxide film (
5b) to form an appropriately sized shape, no chevron-shaped portions are formed in the metal film (7), and the thickness of the resist film (8) formed thereon becomes thinner, resulting in pinholes, etc. Never. Therefore, etching defects of the metal film (7) such as disconnection of metal wiring do not occur.

〔Effect of the invention〕

In the method for manufacturing a semiconductor device Wlt- according to the present invention, a portion of the polycrystalline silicon film other than the portions that should be connected to the polycrystalline silicon electrode/wiring is selectively oxidized to form a silicon oxide film, and the polycrystalline silicon electrode; Since the wiring is shaped so as to be buried in the silicon film, no chevron-shaped portion is formed in the gold film formed in contact with the Qrff portion of the polycrystalline silicon electrode/wiring. Therefore, in order to form this metal film into a metal wiring with a pattern of n Etching defects in the metal film, such as disconnections in wiring, will no longer occur.

[Brief explanation of drawings]

Figure 1 is a top view of an example of a conventional MO8 type silicon gate transistor, Figure 2 is an enlarged cross-sectional view of the metal tin & metal forming ray 1 of the transistor in Figure 1; 4 is an enlarged sectional view of the metal wiring forming process of the method of the embodiment shown in FIG. 3. In the figure, (1) is a silicon substrate (semiconductor substrate), (
3) is insulation 1, (4) is gate insulation Jl', (b)
(5a) is a polycrystalline silicon electrode.
Wiring, (5b) is silicon oxide film, (7) is gold film, (
7a) is a metal wiring, and (8) is a resist film. Incidentally, in the figure, the same number 5 indicates the same or equivalent part. Agent Masuo Oiwa Figure 1 Figure 2 Figure 3 Figure 3 Figure 4 - Hand 1 sleeve, tf'-1! F (voluntary) 1972
Year 3);Ha “shallow 7 +” ~,? Me't, i, i'l' Mr. Commissioner of the Agency 1. Indication of the case: 1982-169582 3. Representative piece of the person making the amendment 111 8th section 4. Agent 5. Specification to be amended. Claims column, Detailed Description of the Invention column, and Brief Description of Drawings column 6, Contents of amendment (1) The scope of claims in the specification will be corrected as shown in the attached appendix. (2) Page 4, line 13, page 8, line 16 of the specification. Correct "metal film" in line 17 of the intervening page and line 18 of the same page to "conductive film." (3) "Metal wiring" on page 4, line 16 and page 9, line 1 is corrected to "wiring j made of the above-mentioned conductive film." (4) Next on page 8, line 8 of the same: Insert the following sentence: "In the above embodiment, a case was described in which a metal film was formed on an interlayer insulating film, but it is not limited to a metal film, and other conductive films may be formed. (5) Ibid., page 9, line 14, 1-metal film” is replaced with “metal film (
4-electroelectric membrane)”. (6) Correct "metal wiring" in lines 14 to 15 of page 9 to "metal wiring (wiring)". 7. List of attached documents (1) Document indicating the scope of patent claims after correction 1 board
Claims (1) A step of forming a polycrystalline silicon film on a semiconductor substrate via an insulating film, and selectively oxidizing parts of the polycrystalline silicon film other than those to be used as polycrystalline silicon electrodes and wiring. In the step of forming a silicon oxide film, a resist film having a predetermined pattern is formed on the partially conductive film of the polycrystalline silicon electrode/wiring, and the conductive film is etched using this resist film as a mask. 1. A method for manufacturing a semiconductor device 1, comprising the step of forming wiring in a predetermined pattern.

Claims (1)

[Claims] (1) A step of forming a polycrystalline silicon film on a semiconductor substrate via an insulating film, and selectively oxidizing the parts of this polycrystalline silicon film other than the polycrystalline silicon electrodes/wirings to form a silicon oxide film. The process of a step of forming a metal film that contacts the polycrystalline silicon with a required portion of the tag/wiring;
A resist film forming a predetermined pattern is formed on the metal 11g, and the metal film is etched using the resist film as a mask to form metal wiring in a predetermined pattern. Semiconductor device 1i”
, [manufacturing method 0