JPH0120391B2 - - Google Patents
Info
- Publication number
- JPH0120391B2 JPH0120391B2 JP58042501A JP4250183A JPH0120391B2 JP H0120391 B2 JPH0120391 B2 JP H0120391B2 JP 58042501 A JP58042501 A JP 58042501A JP 4250183 A JP4250183 A JP 4250183A JP H0120391 B2 JPH0120391 B2 JP H0120391B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- counter
- count
- time
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/25—Testing of logic operation, e.g. by logic analysers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3177—Testing of logic operation, e.g. by logic analysers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Recording Measured Values (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP82104508.5 | 1982-05-24 | ||
| EP82104508A EP0094976B1 (en) | 1982-05-24 | 1982-05-24 | Logic analyzer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58205860A JPS58205860A (ja) | 1983-11-30 |
| JPH0120391B2 true JPH0120391B2 (enExample) | 1989-04-17 |
Family
ID=8189046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58042501A Granted JPS58205860A (ja) | 1982-05-24 | 1983-03-16 | ロジツク・アナライザ |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4559636A (enExample) |
| EP (1) | EP0094976B1 (enExample) |
| JP (1) | JPS58205860A (enExample) |
| DE (1) | DE3272860D1 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4631697A (en) * | 1983-08-11 | 1986-12-23 | Duffers Scientific, Inc. | Signal controlled waveform recorder |
| DE3587625D1 (de) * | 1984-11-12 | 1993-11-18 | Advantest Corp | Logikanalysator. |
| US4673931A (en) * | 1985-03-18 | 1987-06-16 | Tektronix, Inc. | Waveform data display |
| US4731768A (en) * | 1986-09-15 | 1988-03-15 | Tektronix | Autoranging time stamp circuit |
| JPS6391570A (ja) * | 1986-10-07 | 1988-04-22 | Mitsubishi Electric Corp | ロジツク信号観測装置 |
| US5795161A (en) * | 1988-10-20 | 1998-08-18 | Vogel; Peter S. | Apparatus and method for calculating an absolute time at which an event occurred |
| US4982349A (en) * | 1989-06-29 | 1991-01-01 | At&T Bell Laboratories | Response time analysis system |
| US4979177A (en) * | 1989-10-26 | 1990-12-18 | Tektronix, Inc. | Enhanced counter/timer resolution in a logic analyzer |
| US5862369A (en) * | 1991-12-30 | 1999-01-19 | Dell Usa, L.P. | Method and apparatus for state machine optimization using device delay characteristics |
| US5734876A (en) * | 1995-06-07 | 1998-03-31 | National Instruments Corporation | Analyzer for capturing elapsed time values if predetermined conditions have occurred or capturing maximum time value upon counter rollover if predetermined conditions have not occurred |
| FR2774784B1 (fr) * | 1998-02-12 | 2004-09-24 | Inside Technologies | Microprocesseur comportant un systeme de synchronisation avec un evenement asynchrone attendu |
| US6396517B1 (en) | 1999-03-01 | 2002-05-28 | Agilent Technologies, Inc. | Integrated trigger function display system and methodology for trigger definition development in a signal measurement system having a graphical user interface |
| US7409617B2 (en) * | 2004-09-30 | 2008-08-05 | Credence Systems Corporation | System for measuring characteristics of a digital signal |
| US7627790B2 (en) * | 2003-08-21 | 2009-12-01 | Credence Systems Corporation | Apparatus for jitter testing an IC |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4008389A (en) * | 1973-09-05 | 1977-02-15 | Compagnie Honeywell Bull (Societe Anonyme) | Apparatus for checking the operation of control circuits |
| JPS51102689A (ja) * | 1975-03-01 | 1976-09-10 | Takeda Riken Ind Co Ltd | Ronrihakeikiokusochi |
| US4250562A (en) * | 1979-05-22 | 1981-02-10 | Hewlett-Packard Company | Digital signal state analyzer and display |
| JPS5693079A (en) * | 1979-12-27 | 1981-07-28 | Iwatsu Electric Co Ltd | Measurement of time duration |
| CA1163721A (en) * | 1980-08-18 | 1984-03-13 | Milan Slamka | Apparatus for the dynamic in-circuit testing of electronic digital circuit elements |
| US4468746A (en) * | 1981-12-01 | 1984-08-28 | Cincinnati Electronics Corporation | Apparatus for determining interval between two events |
-
1982
- 1982-05-24 DE DE8282104508T patent/DE3272860D1/de not_active Expired
- 1982-05-24 EP EP82104508A patent/EP0094976B1/en not_active Expired
- 1982-11-29 US US06/445,140 patent/US4559636A/en not_active Expired - Fee Related
-
1983
- 1983-03-16 JP JP58042501A patent/JPS58205860A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| EP0094976A1 (en) | 1983-11-30 |
| US4559636A (en) | 1985-12-17 |
| EP0094976B1 (en) | 1986-08-27 |
| JPS58205860A (ja) | 1983-11-30 |
| DE3272860D1 (en) | 1986-10-02 |
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