JPH01147541U - - Google Patents

Info

Publication number
JPH01147541U
JPH01147541U JP4434188U JP4434188U JPH01147541U JP H01147541 U JPH01147541 U JP H01147541U JP 4434188 U JP4434188 U JP 4434188U JP 4434188 U JP4434188 U JP 4434188U JP H01147541 U JPH01147541 U JP H01147541U
Authority
JP
Japan
Prior art keywords
circuit
synchronization
frame
data
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4434188U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4434188U priority Critical patent/JPH01147541U/ja
Publication of JPH01147541U publication Critical patent/JPH01147541U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP4434188U 1988-04-01 1988-04-01 Pending JPH01147541U (en18)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4434188U JPH01147541U (en18) 1988-04-01 1988-04-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4434188U JPH01147541U (en18) 1988-04-01 1988-04-01

Publications (1)

Publication Number Publication Date
JPH01147541U true JPH01147541U (en18) 1989-10-12

Family

ID=31270702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4434188U Pending JPH01147541U (en18) 1988-04-01 1988-04-01

Country Status (1)

Country Link
JP (1) JPH01147541U (en18)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03140032A (ja) * 1989-10-26 1991-06-14 Nec Corp ディジタル多重変換装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03140032A (ja) * 1989-10-26 1991-06-14 Nec Corp ディジタル多重変換装置

Similar Documents

Publication Publication Date Title
JPH07114348B2 (ja) 論理回路
US4317053A (en) High speed synchronization circuit
JPH04319693A (ja) タイマ入力制御回路及びカウンタ制御回路
EP0225512B1 (en) Digital free-running clock synchronizer
JPH01147541U (en18)
EP0209313A3 (en) Clock synchronization circuit for a timer
ITMI991386A1 (it) Circuito per realizzaione di un tempo minimo di wake - up nei circuiti logici di wake - up
JPH01268220A (ja) パルス発生回路
JPS61191657U (en18)
JPH0351137B2 (en18)
JPS617152U (ja) 同期化回路
SU1192126A1 (ru) Устройство дл синхронизации импульсов
SU601757A1 (ru) Оперативное запоминающее устройство
SU1085003A1 (ru) Формирователь сигнала опорной частоты
JPH075701Y2 (ja) トリガ検出回路
JP3185997B2 (ja) クロック同期型信号選択回路
JPH0429253U (en18)
JPH03282805A (ja) クロック信号切換回路
JP2548784B2 (ja) 周期信号発生装置
JPS6465944A (en) Multiframe synchronization circuit
GB1432139A (en) Phase detector
JPH0318142A (ja) データ速度変換回路
JPS6395518A (ja) クロツク乗りかえ回路
JPS63196135U (en18)
JPH01172730U (en18)