JPH01129850U - - Google Patents
Info
- Publication number
- JPH01129850U JPH01129850U JP2531188U JP2531188U JPH01129850U JP H01129850 U JPH01129850 U JP H01129850U JP 2531188 U JP2531188 U JP 2531188U JP 2531188 U JP2531188 U JP 2531188U JP H01129850 U JPH01129850 U JP H01129850U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- terminal portion
- resin
- taken out
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 238000007789 sealing Methods 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａは本考案の一実施例の封止樹脂を透視
した平面図、同図ｂは同図ａのＡ―Ａ断面図、第
２図ａは従来の半導体装置の平面図、同図ｂは同
図ａのＡ―Ａ断面図、第３図は本考案の他の実施
例断面図である。
１……半導体素子搭載部、２……吊りリード、
３，４……外部電極導出部、５……半導体素子、
６……金属細線、７……封止樹脂。
Figure 1a is a plan view seen through the sealing resin of an embodiment of the present invention, figure b is a cross-sectional view taken along line AA in figure a, and figure 2a is a plan view of a conventional semiconductor device. b is a cross-sectional view taken along the line A--A in the figure a, and FIG. 3 is a cross-sectional view of another embodiment of the present invention. 1...Semiconductor element mounting part, 2...Hanging lead,
3, 4...External electrode lead-out portion, 5...Semiconductor element,
6... Fine metal wire, 7... Sealing resin.
Claims (1)
用の端子部とを有し、前記端子部の樹脂表面まで
の取り出す方向を半導体素子に対し垂直方向にし
たことを特徴とする半導体装置。 1. A semiconductor device comprising a semiconductor element portion externally sealed with resin and a terminal portion for external connection, the terminal portion being taken out to the resin surface in a direction perpendicular to the semiconductor element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2531188U JPH01129850U (en) | 1988-02-26 | 1988-02-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2531188U JPH01129850U (en) | 1988-02-26 | 1988-02-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01129850U true JPH01129850U (en) | 1989-09-04 |
Family
ID=31245938
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2531188U Pending JPH01129850U (en) | 1988-02-26 | 1988-02-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01129850U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4597448B2 (en) * | 1999-08-09 | 2010-12-15 | ローム株式会社 | Semiconductor device and manufacturing method thereof |
-
1988
- 1988-02-26 JP JP2531188U patent/JPH01129850U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4597448B2 (en) * | 1999-08-09 | 2010-12-15 | ローム株式会社 | Semiconductor device and manufacturing method thereof |