JPS63172138U - - Google Patents

Info

Publication number
JPS63172138U
JPS63172138U JP1987064334U JP6433487U JPS63172138U JP S63172138 U JPS63172138 U JP S63172138U JP 1987064334 U JP1987064334 U JP 1987064334U JP 6433487 U JP6433487 U JP 6433487U JP S63172138 U JPS63172138 U JP S63172138U
Authority
JP
Japan
Prior art keywords
substrate
semiconductor device
lead wire
wire tip
slit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987064334U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987064334U priority Critical patent/JPS63172138U/ja
Publication of JPS63172138U publication Critical patent/JPS63172138U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案に係る半導体装置の要部切欠
裏面図、第2図は、その要部切欠側断面図、第3
図は、従来の半導体装置の側断面図である。 11……基板、12……素子、13……リード
線、14……ワイヤ、15……樹脂、17……ス
リツト。
FIG. 1 is a cutaway back view of the main part of a semiconductor device according to the present invention, FIG. 2 is a cutaway side sectional view of the main part, and FIG.
The figure is a side sectional view of a conventional semiconductor device. 11...Substrate, 12...Element, 13...Lead wire, 14...Wire, 15...Resin, 17...Slit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板と、基板に取付けた素子と、外部に導出す
るリード線先端と、リード線先端と素子の電極を
結線したワイヤを、樹脂で埋設封止した半導体装
置において、前記基板の素子取付面とは反対側の
面に、スリツトを形成したことを特徴とする半導
体装置。
In a semiconductor device in which a substrate, an element attached to the substrate, a lead wire tip led out to the outside, and a wire connecting the lead wire tip and the electrode of the element are buried and sealed in resin, what is the element mounting surface of the substrate? A semiconductor device characterized in that a slit is formed on the opposite surface.
JP1987064334U 1987-04-28 1987-04-28 Pending JPS63172138U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987064334U JPS63172138U (en) 1987-04-28 1987-04-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987064334U JPS63172138U (en) 1987-04-28 1987-04-28

Publications (1)

Publication Number Publication Date
JPS63172138U true JPS63172138U (en) 1988-11-09

Family

ID=30900398

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987064334U Pending JPS63172138U (en) 1987-04-28 1987-04-28

Country Status (1)

Country Link
JP (1) JPS63172138U (en)

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