JPH01104729U - - Google Patents

Info

Publication number
JPH01104729U
JPH01104729U JP20139787U JP20139787U JPH01104729U JP H01104729 U JPH01104729 U JP H01104729U JP 20139787 U JP20139787 U JP 20139787U JP 20139787 U JP20139787 U JP 20139787U JP H01104729 U JPH01104729 U JP H01104729U
Authority
JP
Japan
Prior art keywords
ceramic substrate
alloy
based metal
substrate according
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20139787U
Other languages
English (en)
Other versions
JPH079382Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP20139787U priority Critical patent/JPH079382Y2/ja
Priority to US07/290,941 priority patent/US5011734A/en
Publication of JPH01104729U publication Critical patent/JPH01104729U/ja
Application granted granted Critical
Publication of JPH079382Y2 publication Critical patent/JPH079382Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12535—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.] with additional, spatially distinct nonmetal component
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/26—Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
    • Y10T428/263—Coating layer not in excess of 5 mils thick or equivalent
    • Y10T428/264—Up to 3 mils
    • Y10T428/265—1 mil or less
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31678—Of metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Ceramic Products (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の実施例を説明する分解斜視図
である。 １０……ベース、２０……キヤツプ、７０，８
０……メタライズ層。

Claims (1)

  1. 【実用新案登録請求の範囲】 １ 板状セラミツクの表面にＡｕ系金属またはＣ
    ｕ系金属からなるメタライズ層を設けると共に、
    該メタライズ層に重ねてＮｉメツキ層を設けたこ
    とを特徴とするセラミツク基板。 ２ 上記メタライズ層が、上記板状セラミツクの
    焼成と同時に形成される実用新案登録請求の範囲
    第１項記載のセラミツク基板。 ３ 上記板状セラミツクの焼成温度が８００〜１
    １００℃である実用新案登録請求の範囲第１項ま
    たは第２項記載のセラミツク基板。 ４ 上記Ａｕ系金属が、Ａｕ，Ａｕ―Ｐｔ合金及
    びＡｕ―Ｐｄ合金のいずれかである実用新案登録
    請求の範囲第１項ないし第３項いずれか記載のセ
    ラミツク基板。 ５ 上記Ｃｕ系金属が、Ｃｕ，Ｃｕ―Ｐｔ合金及
    びＣｕ―Ｐｄ合金のいずれかである実用新案登録
    請求の範囲第１項ないし第３項いずれか記載のセ
    ラミツク基板。
JP20139787U 1987-12-28 1987-12-28 セラミック基板 Expired - Lifetime JPH079382Y2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP20139787U JPH079382Y2 (ja) 1987-12-28 1987-12-28 セラミック基板
US07/290,941 US5011734A (en) 1987-12-28 1988-12-28 Ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20139787U JPH079382Y2 (ja) 1987-12-28 1987-12-28 セラミック基板

Publications (2)

Publication Number Publication Date
JPH01104729U true JPH01104729U (ja) 1989-07-14
JPH079382Y2 JPH079382Y2 (ja) 1995-03-06

Family

ID=16440412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20139787U Expired - Lifetime JPH079382Y2 (ja) 1987-12-28 1987-12-28 セラミック基板

Country Status (2)

Country Link
US (1) US5011734A (ja)
JP (1) JPH079382Y2 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103077928A (zh) * 2013-02-16 2013-05-01 马国荣 单面局部镀金的盖板结构

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60137884A (ja) * 1983-12-26 1985-07-22 株式会社日立製作所 セラミツク多層配線回路基板の製造法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5992943A (ja) * 1982-11-15 1984-05-29 Ngk Spark Plug Co Ltd 結晶化ガラス体
US4540621A (en) * 1983-07-29 1985-09-10 Eggerding Carl L Dielectric substrates comprising cordierite and method of forming the same
US4546065A (en) * 1983-08-08 1985-10-08 International Business Machines Corporation Process for forming a pattern of metallurgy on the top of a ceramic substrate
US4599277A (en) * 1984-10-09 1986-07-08 International Business Machines Corp. Control of the sintering of powdered metals
US4712161A (en) * 1985-03-25 1987-12-08 Olin Corporation Hybrid and multi-layer circuitry
JPH0634452B2 (ja) * 1985-08-05 1994-05-02 株式会社日立製作所 セラミツクス回路基板

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60137884A (ja) * 1983-12-26 1985-07-22 株式会社日立製作所 セラミツク多層配線回路基板の製造法

Also Published As

Publication number Publication date
JPH079382Y2 (ja) 1995-03-06
US5011734A (en) 1991-04-30

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