JP7771081B2 - トランジスタ、及び半導体装置 - Google Patents

トランジスタ、及び半導体装置

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Publication number
JP7771081B2
JP7771081B2 JP2022563255A JP2022563255A JP7771081B2 JP 7771081 B2 JP7771081 B2 JP 7771081B2 JP 2022563255 A JP2022563255 A JP 2022563255A JP 2022563255 A JP2022563255 A JP 2022563255A JP 7771081 B2 JP7771081 B2 JP 7771081B2
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Japan
Prior art keywords
transistor
oxide
layer
insulator
region
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Active
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JP2022563255A
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English (en)
Japanese (ja)
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JPWO2022106955A1 (https=
JPWO2022106955A5 (https=
Inventor
優希 伊藤
寛司 國武
和幸 種村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of JPWO2022106955A1 publication Critical patent/JPWO2022106955A1/ja
Publication of JPWO2022106955A5 publication Critical patent/JPWO2022106955A5/ja
Priority to JP2025186353A priority Critical patent/JP2026015370A/ja
Application granted granted Critical
Publication of JP7771081B2 publication Critical patent/JP7771081B2/ja
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G06G7/16Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for multiplication or division
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B51/00Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors
    • H10B51/30Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733Multi-gate TFTs
    • H10D30/6734Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739Conductor-insulator-semiconductor electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/701IGFETs having ferroelectric gate insulators, e.g. ferroelectric FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/223Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using MOS with ferroelectric gate insulating film
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225Auxiliary circuits
    • G11C11/2275Writing or programming circuits or methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Neurology (AREA)
  • Biophysics (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Power Engineering (AREA)
  • Evolutionary Computation (AREA)
  • Thin Film Transistor (AREA)
JP2022563255A 2020-11-20 2021-11-09 トランジスタ、及び半導体装置 Active JP7771081B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025186353A JP2026015370A (ja) 2020-11-20 2025-11-05 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020193613 2020-11-20
JP2020193613 2020-11-20
PCT/IB2021/060337 WO2022106955A1 (ja) 2020-11-20 2021-11-09 トランジスタ、及び半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025186353A Division JP2026015370A (ja) 2020-11-20 2025-11-05 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2022106955A1 JPWO2022106955A1 (https=) 2022-05-27
JPWO2022106955A5 JPWO2022106955A5 (https=) 2024-10-24
JP7771081B2 true JP7771081B2 (ja) 2025-11-17

Family

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Family Applications (2)

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JP2022563255A Active JP7771081B2 (ja) 2020-11-20 2021-11-09 トランジスタ、及び半導体装置
JP2025186353A Pending JP2026015370A (ja) 2020-11-20 2025-11-05 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025186353A Pending JP2026015370A (ja) 2020-11-20 2025-11-05 半導体装置

Country Status (4)

Country Link
US (1) US20230411521A1 (https=)
JP (2) JP7771081B2 (https=)
CN (1) CN116457790A (https=)
WO (1) WO2022106955A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12369325B2 (en) * 2022-06-15 2025-07-22 Taiwan Semiconductor Manufacturing Company, Ltd. Gate-last tri-gate FeFET
CN118522733B (zh) * 2024-05-10 2026-01-23 中国科学院微电子研究所 一种铁电器件及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010131311A1 (ja) 2009-05-13 2010-11-18 パナソニック株式会社 半導体メモリセルおよびその製造方法
JP2011049537A (ja) 2009-08-25 2011-03-10 Korea Electronics Telecommun 不揮発性メモリセル及びその製造方法
WO2017090559A1 (ja) 2015-11-25 2017-06-01 東レ株式会社 強誘電体記憶素子、その製造方法、ならびにそれを用いたメモリセルおよびそれを用いた無線通信装置
WO2018234919A1 (ja) 2017-06-21 2018-12-27 株式会社半導体エネルギー研究所 ニューラルネットワークを有する半導体装置
JP2019023853A (ja) 2017-05-03 2019-02-14 株式会社半導体エネルギー研究所 ニューラルネットワーク、蓄電システム、車両、及び電子機器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010131311A1 (ja) 2009-05-13 2010-11-18 パナソニック株式会社 半導体メモリセルおよびその製造方法
JP2011049537A (ja) 2009-08-25 2011-03-10 Korea Electronics Telecommun 不揮発性メモリセル及びその製造方法
WO2017090559A1 (ja) 2015-11-25 2017-06-01 東レ株式会社 強誘電体記憶素子、その製造方法、ならびにそれを用いたメモリセルおよびそれを用いた無線通信装置
JP2019023853A (ja) 2017-05-03 2019-02-14 株式会社半導体エネルギー研究所 ニューラルネットワーク、蓄電システム、車両、及び電子機器
WO2018234919A1 (ja) 2017-06-21 2018-12-27 株式会社半導体エネルギー研究所 ニューラルネットワークを有する半導体装置

Also Published As

Publication number Publication date
CN116457790A (zh) 2023-07-18
JP2026015370A (ja) 2026-01-29
US20230411521A1 (en) 2023-12-21
JPWO2022106955A1 (https=) 2022-05-27
WO2022106955A1 (ja) 2022-05-27

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