JP7694816B2 - 半導体装置とその製造方法 - Google Patents

半導体装置とその製造方法 Download PDF

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Publication number
JP7694816B2
JP7694816B2 JP2024514809A JP2024514809A JP7694816B2 JP 7694816 B2 JP7694816 B2 JP 7694816B2 JP 2024514809 A JP2024514809 A JP 2024514809A JP 2024514809 A JP2024514809 A JP 2024514809A JP 7694816 B2 JP7694816 B2 JP 7694816B2
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JPWO2023199570A5 (https=
JPWO2023199570A1 (https=
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秀史 高谷
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Denso Corp
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Denso Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H10D62/157—Impurity concentrations or distributions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

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  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2024514809A 2022-04-14 2023-01-26 半導体装置とその製造方法 Active JP7694816B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025091800A JP2025122207A (ja) 2022-04-14 2025-06-02 半導体装置とその製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2022066834 2022-04-14
JP2022066834 2022-04-14
PCT/JP2023/002514 WO2023199570A1 (ja) 2022-04-14 2023-01-26 半導体装置とその製造方法

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JPWO2023199570A1 JPWO2023199570A1 (https=) 2023-10-19
JPWO2023199570A5 JPWO2023199570A5 (https=) 2024-04-30
JP7694816B2 true JP7694816B2 (ja) 2025-06-18

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JP2025091800A Pending JP2025122207A (ja) 2022-04-14 2025-06-02 半導体装置とその製造方法

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US (1) US20250040205A1 (https=)
EP (1) EP4510194A4 (https=)
JP (2) JP7694816B2 (https=)
CN (1) CN119054083A (https=)
WO (1) WO2023199570A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025187565A1 (ja) * 2024-03-05 2025-09-12 株式会社デンソー 半導体装置およびその製造方法
WO2025258666A1 (ja) * 2024-06-13 2025-12-18 株式会社デンソー 半導体装置
WO2026048876A1 (ja) * 2024-08-29 2026-03-05 株式会社デンソー 半導体装置
EP4734698A1 (en) * 2024-10-22 2026-04-29 Samsung Electronics Co., Ltd. Semiconductor device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000260984A (ja) 1999-03-10 2000-09-22 Toshiba Corp 高耐圧半導体素子
JP2005019528A (ja) 2003-06-24 2005-01-20 Toyota Central Res & Dev Lab Inc 半導体装置とその製造方法
JP2010225615A (ja) 2009-03-19 2010-10-07 Denso Corp 炭化珪素半導体装置およびその製造方法
JP2013038308A (ja) 2011-08-10 2013-02-21 Denso Corp 炭化珪素半導体装置およびその製造方法
JP2016225455A (ja) 2015-05-29 2016-12-28 株式会社デンソー 半導体装置およびその製造方法
WO2017098547A1 (ja) 2015-12-07 2017-06-15 三菱電機株式会社 炭化珪素半導体装置
JP2017152489A (ja) 2016-02-23 2017-08-31 株式会社デンソー 化合物半導体装置およびその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3993458B2 (ja) 2002-04-17 2007-10-17 株式会社東芝 半導体装置
JP4793390B2 (ja) * 2008-02-13 2011-10-12 株式会社デンソー 炭化珪素半導体装置およびその製造方法
JP6485382B2 (ja) 2016-02-23 2019-03-20 株式会社デンソー 化合物半導体装置の製造方法および化合物半導体装置
JP6617657B2 (ja) * 2016-07-29 2019-12-11 富士電機株式会社 炭化ケイ素半導体装置および炭化ケイ素半導体装置の製造方法
JP7275573B2 (ja) * 2018-12-27 2023-05-18 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
JP7140148B2 (ja) * 2019-02-27 2022-09-21 株式会社デンソー 炭化珪素半導体装置およびその製造方法
JP7278914B2 (ja) * 2019-09-13 2023-05-22 株式会社東芝 半導体装置、半導体装置の製造方法、インバータ回路、駆動装置、車両、及び、昇降機

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000260984A (ja) 1999-03-10 2000-09-22 Toshiba Corp 高耐圧半導体素子
JP2005019528A (ja) 2003-06-24 2005-01-20 Toyota Central Res & Dev Lab Inc 半導体装置とその製造方法
JP2010225615A (ja) 2009-03-19 2010-10-07 Denso Corp 炭化珪素半導体装置およびその製造方法
JP2013038308A (ja) 2011-08-10 2013-02-21 Denso Corp 炭化珪素半導体装置およびその製造方法
JP2016225455A (ja) 2015-05-29 2016-12-28 株式会社デンソー 半導体装置およびその製造方法
WO2017098547A1 (ja) 2015-12-07 2017-06-15 三菱電機株式会社 炭化珪素半導体装置
JP2017152489A (ja) 2016-02-23 2017-08-31 株式会社デンソー 化合物半導体装置およびその製造方法

Also Published As

Publication number Publication date
JP2025122207A (ja) 2025-08-20
CN119054083A (zh) 2024-11-29
JPWO2023199570A1 (https=) 2023-10-19
WO2023199570A1 (ja) 2023-10-19
EP4510194A1 (en) 2025-02-19
EP4510194A4 (en) 2025-07-30
US20250040205A1 (en) 2025-01-30

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