JP7525186B2 - 半導体デバイス - Google Patents

半導体デバイス Download PDF

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Publication number
JP7525186B2
JP7525186B2 JP2022528359A JP2022528359A JP7525186B2 JP 7525186 B2 JP7525186 B2 JP 7525186B2 JP 2022528359 A JP2022528359 A JP 2022528359A JP 2022528359 A JP2022528359 A JP 2022528359A JP 7525186 B2 JP7525186 B2 JP 7525186B2
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Japan
Prior art keywords
alloy
diffusion barrier
wiring
metal
film
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JP2022528359A
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Japanese (ja)
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JPWO2021245893A1 (https=
JPWO2021245893A5 (https=
Inventor
淳一 小池
政隆 矢作
裕貴 山田
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Tohoku University NUC
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Tohoku University NUC
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44Physical vapour deposition [PVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435Cross-sectional shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4437Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a transition metal

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2022528359A 2020-06-04 2020-06-04 半導体デバイス Active JP7525186B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/022202 WO2021245893A1 (ja) 2020-06-04 2020-06-04 半導体デバイス

Publications (3)

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JPWO2021245893A1 JPWO2021245893A1 (https=) 2021-12-09
JPWO2021245893A5 JPWO2021245893A5 (https=) 2023-02-17
JP7525186B2 true JP7525186B2 (ja) 2024-07-30

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Family Applications (1)

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JP2022528359A Active JP7525186B2 (ja) 2020-06-04 2020-06-04 半導体デバイス

Country Status (6)

Country Link
US (1) US12444686B2 (https=)
JP (1) JP7525186B2 (https=)
KR (1) KR102865111B1 (https=)
CN (1) CN115699268A (https=)
TW (1) TWI795789B (https=)
WO (1) WO2021245893A1 (https=)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001007204A (ja) 1999-06-24 2001-01-12 Nec Corp 多層配線の構造及びその製造方法
JP2008053753A (ja) 2007-11-08 2008-03-06 Toshiba Corp 半導体装置の製造方法
JP2008098424A (ja) 2006-10-12 2008-04-24 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP2012169480A (ja) 2011-02-15 2012-09-06 Panasonic Corp 半導体装置及びその製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3062464B2 (ja) * 1997-11-14 2000-07-10 松下電子工業株式会社 半導体装置
US8696875B2 (en) 1999-10-08 2014-04-15 Applied Materials, Inc. Self-ionized and inductively-coupled plasma for sputtering and resputtering
US6833058B1 (en) * 2000-10-24 2004-12-21 Honeywell International Inc. Titanium-based and zirconium-based mixed materials and sputtering targets
CN101847598B (zh) 2001-11-14 2012-06-20 应用材料有限公司 用于溅射和再溅射的自离子化及电感耦合等离子体
AU2003266560A1 (en) * 2002-12-09 2004-06-30 Yoshihiro Hayashi Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device
CN1957487A (zh) * 2004-01-06 2007-05-02 Cymbet公司 具有一个或者更多个可限定层的层式阻挡物结构和方法
KR100761467B1 (ko) 2006-06-28 2007-09-27 삼성전자주식회사 금속배선 및 그 형성 방법
US9735123B2 (en) * 2014-03-13 2017-08-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device structure and manufacturing method
WO2018063815A1 (en) 2016-10-02 2018-04-05 Applied Materials, Inc. Doped selective metal caps to improve copper electromigration with ruthenium liner
US10510657B2 (en) * 2017-09-26 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with interconnecting structure and method for manufacturing the same
US10796995B2 (en) 2017-11-29 2020-10-06 Tohoku University Semiconductor devices including a first cobalt alloy in a first barrier layer and a second cobalt alloy in a second barrier layer
US11043373B2 (en) * 2018-07-31 2021-06-22 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect system with improved low-k dielectrics
US11158538B2 (en) * 2020-02-04 2021-10-26 International Business Machines Corporation Interconnect structures with cobalt-infused ruthenium liner and a cobalt cap

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001007204A (ja) 1999-06-24 2001-01-12 Nec Corp 多層配線の構造及びその製造方法
JP2008098424A (ja) 2006-10-12 2008-04-24 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP2008053753A (ja) 2007-11-08 2008-03-06 Toshiba Corp 半導体装置の製造方法
JP2012169480A (ja) 2011-02-15 2012-09-06 Panasonic Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
WO2021245893A1 (ja) 2021-12-09
US20230154851A1 (en) 2023-05-18
TWI795789B (zh) 2023-03-11
US12444686B2 (en) 2025-10-14
JPWO2021245893A1 (https=) 2021-12-09
TW202147938A (zh) 2021-12-16
KR102865111B1 (ko) 2025-09-25
KR20230020995A (ko) 2023-02-13
CN115699268A (zh) 2023-02-03

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