TWI795789B - 半導體設備 - Google Patents

半導體設備 Download PDF

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Publication number
TWI795789B
TWI795789B TW110118925A TW110118925A TWI795789B TW I795789 B TWI795789 B TW I795789B TW 110118925 A TW110118925 A TW 110118925A TW 110118925 A TW110118925 A TW 110118925A TW I795789 B TWI795789 B TW I795789B
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TW
Taiwan
Prior art keywords
diffusion barrier
wiring
insulating layer
barrier layer
film
Prior art date
Application number
TW110118925A
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English (en)
Chinese (zh)
Other versions
TW202147938A (zh
Inventor
小池淳一
矢作政隆
山田裕貴
Original Assignee
國立大學法人東北大學
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Application filed by 國立大學法人東北大學 filed Critical 國立大學法人東北大學
Publication of TW202147938A publication Critical patent/TW202147938A/zh
Application granted granted Critical
Publication of TWI795789B publication Critical patent/TWI795789B/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4437—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a transition metal

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
TW110118925A 2020-06-04 2021-05-25 半導體設備 TWI795789B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
WOPCT/JP2020/022202 2020-06-04
PCT/JP2020/022202 WO2021245893A1 (ja) 2020-06-04 2020-06-04 半導体デバイス

Publications (2)

Publication Number Publication Date
TW202147938A TW202147938A (zh) 2021-12-16
TWI795789B true TWI795789B (zh) 2023-03-11

Family

ID=78830718

Family Applications (1)

Application Number Title Priority Date Filing Date
TW110118925A TWI795789B (zh) 2020-06-04 2021-05-25 半導體設備

Country Status (6)

Country Link
US (1) US12444686B2 (https=)
JP (1) JP7525186B2 (https=)
KR (1) KR102865111B1 (https=)
CN (1) CN115699268A (https=)
TW (1) TWI795789B (https=)
WO (1) WO2021245893A1 (https=)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1957487A (zh) * 2004-01-06 2007-05-02 Cymbet公司 具有一个或者更多个可限定层的层式阻挡物结构和方法
JP2012169480A (ja) * 2011-02-15 2012-09-06 Panasonic Corp 半導体装置及びその製造方法
TW201539689A (zh) * 2014-03-13 2015-10-16 台灣積體電路製造股份有限公司 半導體元件結構及形成方法
CN110783271A (zh) * 2018-07-31 2020-02-11 台湾积体电路制造股份有限公司 半导体结构的形成方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3062464B2 (ja) * 1997-11-14 2000-07-10 松下電子工業株式会社 半導体装置
JP3562628B2 (ja) 1999-06-24 2004-09-08 日本電気株式会社 拡散バリア膜、多層配線構造、およびそれらの製造方法
US8696875B2 (en) 1999-10-08 2014-04-15 Applied Materials, Inc. Self-ionized and inductively-coupled plasma for sputtering and resputtering
US6833058B1 (en) * 2000-10-24 2004-12-21 Honeywell International Inc. Titanium-based and zirconium-based mixed materials and sputtering targets
CN101847598B (zh) 2001-11-14 2012-06-20 应用材料有限公司 用于溅射和再溅射的自离子化及电感耦合等离子体
AU2003266560A1 (en) * 2002-12-09 2004-06-30 Yoshihiro Hayashi Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device
KR100761467B1 (ko) 2006-06-28 2007-09-27 삼성전자주식회사 금속배선 및 그 형성 방법
JP5016286B2 (ja) 2006-10-12 2012-09-05 ローム株式会社 半導体装置および半導体装置の製造方法
JP2008053753A (ja) 2007-11-08 2008-03-06 Toshiba Corp 半導体装置の製造方法
WO2018063815A1 (en) 2016-10-02 2018-04-05 Applied Materials, Inc. Doped selective metal caps to improve copper electromigration with ruthenium liner
US10510657B2 (en) * 2017-09-26 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with interconnecting structure and method for manufacturing the same
US10796995B2 (en) 2017-11-29 2020-10-06 Tohoku University Semiconductor devices including a first cobalt alloy in a first barrier layer and a second cobalt alloy in a second barrier layer
US11158538B2 (en) * 2020-02-04 2021-10-26 International Business Machines Corporation Interconnect structures with cobalt-infused ruthenium liner and a cobalt cap

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1957487A (zh) * 2004-01-06 2007-05-02 Cymbet公司 具有一个或者更多个可限定层的层式阻挡物结构和方法
JP2012169480A (ja) * 2011-02-15 2012-09-06 Panasonic Corp 半導体装置及びその製造方法
TW201539689A (zh) * 2014-03-13 2015-10-16 台灣積體電路製造股份有限公司 半導體元件結構及形成方法
CN110783271A (zh) * 2018-07-31 2020-02-11 台湾积体电路制造股份有限公司 半导体结构的形成方法

Also Published As

Publication number Publication date
WO2021245893A1 (ja) 2021-12-09
US20230154851A1 (en) 2023-05-18
US12444686B2 (en) 2025-10-14
JPWO2021245893A1 (https=) 2021-12-09
TW202147938A (zh) 2021-12-16
KR102865111B1 (ko) 2025-09-25
KR20230020995A (ko) 2023-02-13
CN115699268A (zh) 2023-02-03
JP7525186B2 (ja) 2024-07-30

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