JP7518180B2 - 寿命初期故障を起こしやすいダイの予測 - Google Patents

寿命初期故障を起こしやすいダイの予測 Download PDF

Info

Publication number
JP7518180B2
JP7518180B2 JP2022552923A JP2022552923A JP7518180B2 JP 7518180 B2 JP7518180 B2 JP 7518180B2 JP 2022552923 A JP2022552923 A JP 2022552923A JP 2022552923 A JP2022552923 A JP 2022552923A JP 7518180 B2 JP7518180 B2 JP 7518180B2
Authority
JP
Japan
Prior art keywords
dies
predicted
die
yield
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2022552923A
Other languages
English (en)
Japanese (ja)
Other versions
JP2023517873A (ja
JP2023517873A5 (https=
Inventor
バーチ,リチャード
ツー,シン
アーノルド,ケイス
Original Assignee
ピーディーエフ ソリューションズ,インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ピーディーエフ ソリューションズ,インコーポレイテッド filed Critical ピーディーエフ ソリューションズ,インコーポレイテッド
Publication of JP2023517873A publication Critical patent/JP2023517873A/ja
Publication of JP2023517873A5 publication Critical patent/JP2023517873A5/ja
Application granted granted Critical
Publication of JP7518180B2 publication Critical patent/JP7518180B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • G06F30/27Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00Machine learning
    • G06N20/20Ensemble learning
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/02Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/04Ageing analysis or optimisation against ageing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/22Yield analysis or yield optimisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Geometry (AREA)
  • Medical Informatics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Artificial Intelligence (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2022552923A 2020-03-03 2021-03-02 寿命初期故障を起こしやすいダイの予測 Active JP7518180B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202062984337P 2020-03-03 2020-03-03
US62/984,337 2020-03-03
PCT/US2021/020396 WO2021178361A1 (en) 2020-03-03 2021-03-02 Predicting die susceptible to early lifetime failure

Publications (3)

Publication Number Publication Date
JP2023517873A JP2023517873A (ja) 2023-04-27
JP2023517873A5 JP2023517873A5 (https=) 2024-03-12
JP7518180B2 true JP7518180B2 (ja) 2024-07-17

Family

ID=77555869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022552923A Active JP7518180B2 (ja) 2020-03-03 2021-03-02 寿命初期故障を起こしやすいダイの予測

Country Status (6)

Country Link
US (1) US11328108B2 (https=)
JP (1) JP7518180B2 (https=)
KR (1) KR102797770B1 (https=)
CN (1) CN115362457B (https=)
TW (1) TWI862795B (https=)
WO (1) WO2021178361A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230049810A (ko) * 2021-10-06 2023-04-14 삼성전자주식회사 컴퓨팅 장치, 그것을 갖는 트랜지스터 모델링 장치, 및 그것의 동작 방법
JP7777433B2 (ja) * 2021-11-25 2025-11-28 株式会社フジクラ 検査装置、検査方法、検査プログラム、半導体デバイスの製造方法
TWI841293B (zh) * 2023-03-14 2024-05-01 華邦電子股份有限公司 記憶體測試方法及裝置
CN119129403B (zh) * 2024-08-29 2025-04-25 辰极智航(北京)科技有限公司 一种芯片立体封装工艺技术的可靠性数据管理方法及系统

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265232B1 (en) 1998-08-21 2001-07-24 Micron Technology, Inc. Yield based, in-line defect sampling method
US20030120445A1 (en) 2001-12-26 2003-06-26 International Business Machines Corporation Method of statistical binning for reliability selection
US7220605B1 (en) 2004-05-26 2007-05-22 Pdf Solutions, Inc. Selecting dice to test using a yield map
US20090106714A1 (en) 2007-10-23 2009-04-23 International Business Machines Corporation Methods and system for analysis and management of parametric yield
US20110153660A1 (en) 2008-10-15 2011-06-23 Inotera Memories, Inc. Method of searching for key semiconductor operation with randomization for wafer position
JP2012145534A (ja) 2011-01-14 2012-08-02 Fujitsu Semiconductor Ltd 欠陥検査装置及び欠陥検査方法
JP2017536584A (ja) 2014-11-25 2017-12-07 ストリーム モザイク,インコーポレイテッド 半導体製造プロセスのための改善されたプロセス制御技術
WO2018202361A1 (en) 2017-05-05 2018-11-08 Asml Netherlands B.V. Method to predict yield of a device manufacturing process

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8017411B2 (en) * 2002-12-18 2011-09-13 GlobalFoundries, Inc. Dynamic adaptive sampling rate for model prediction
JP5297272B2 (ja) * 2009-06-11 2013-09-25 株式会社日立製作所 装置異常監視方法及びシステム
US10386828B2 (en) 2015-12-17 2019-08-20 Lam Research Corporation Methods and apparatuses for etch profile matching by surface kinetic model optimization
EP3352013A1 (en) * 2017-01-23 2018-07-25 ASML Netherlands B.V. Generating predicted data for control or monitoring of a production process
US10522376B2 (en) * 2017-10-20 2019-12-31 Kla-Tencor Corporation Multi-step image alignment method for large offset die-die inspection
KR102549196B1 (ko) * 2018-02-07 2023-06-30 어플라이드 머티리얼즈 이스라엘 리미티드 반도체 시편의 심층 학습 기반 검사 방법 및 그의 시스템
US10867877B2 (en) * 2018-03-20 2020-12-15 Kla Corporation Targeted recall of semiconductor devices based on manufacturing data
US10872403B2 (en) 2018-08-10 2020-12-22 Micron Technology, Inc. System for predicting properties of structures, imager system, and related methods
CN110378490A (zh) * 2019-07-24 2019-10-25 江苏壹度科技股份有限公司 基于改进鲸鱼算法优化支持向量机的半导体良率预测方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265232B1 (en) 1998-08-21 2001-07-24 Micron Technology, Inc. Yield based, in-line defect sampling method
US20030120445A1 (en) 2001-12-26 2003-06-26 International Business Machines Corporation Method of statistical binning for reliability selection
US7220605B1 (en) 2004-05-26 2007-05-22 Pdf Solutions, Inc. Selecting dice to test using a yield map
US20090106714A1 (en) 2007-10-23 2009-04-23 International Business Machines Corporation Methods and system for analysis and management of parametric yield
US20110153660A1 (en) 2008-10-15 2011-06-23 Inotera Memories, Inc. Method of searching for key semiconductor operation with randomization for wafer position
JP2012145534A (ja) 2011-01-14 2012-08-02 Fujitsu Semiconductor Ltd 欠陥検査装置及び欠陥検査方法
JP2017536584A (ja) 2014-11-25 2017-12-07 ストリーム モザイク,インコーポレイテッド 半導体製造プロセスのための改善されたプロセス制御技術
WO2018202361A1 (en) 2017-05-05 2018-11-08 Asml Netherlands B.V. Method to predict yield of a device manufacturing process

Also Published As

Publication number Publication date
JP2023517873A (ja) 2023-04-27
WO2021178361A1 (en) 2021-09-10
TW202146918A (zh) 2021-12-16
US20210279388A1 (en) 2021-09-09
US11328108B2 (en) 2022-05-10
KR102797770B1 (ko) 2025-04-17
CN115362457B (zh) 2024-01-23
TWI862795B (zh) 2024-11-21
KR20220149714A (ko) 2022-11-08
CN115362457A (zh) 2022-11-18

Similar Documents

Publication Publication Date Title
JP7518180B2 (ja) 寿命初期故障を起こしやすいダイの予測
KR102258942B1 (ko) 인라인 수율 모니터링을 위한 임계 파라메트릭 전기 테스트 파라미터의 자동 결정을 위한 시스템 및 방법
US10151792B2 (en) Manufacturing method and program of semiconductor device
US7415387B2 (en) Die and wafer failure classification system and method
KR0164247B1 (ko) 인텔리전트 테스트라인 시스템
JP6656984B2 (ja) 半導体装置の製造方法
US7991497B2 (en) Method and system for defect detection in manufacturing integrated circuits
TW202312002A (zh) 用於重建構半導體構件在晶圓上的位置的方法與設備
Bellarmino et al. Microcontroller performance screening: Optimizing the characterization in the presence of anomalous and noisy data
JP2007235108A (ja) 半導体検査装置、半導体検査方法
US6701477B1 (en) Method for identifying the cause of yield loss in integrated circuit manufacture
KR20200088012A (ko) 반도체 제조 공정에서 특징 선택 기법에 따른 멀티 분류기를 활용한 불량 패턴 예측 장치 및 방법
US6898539B2 (en) Method for analyzing final test parameters
Barnett et al. Yield-reliability modeling: experimental verification and application to burn-in reduction
CN117272122B (zh) 晶圆异常的共性分析方法及装置、可读存储介质、终端
JP2002368056A (ja) 歩留まり条件の提供方法、製造条件の決定方法、半導体装置の製造方法、および記録媒体
JP2025044587A (ja) 情報処理装置および方法
CN117881973A (zh) 用于多维动态零件平均测试的系统和方法
US20250052814A1 (en) Prediction of Failure Probabilities of Chips of a Wafer
JP7808311B2 (ja) ウェーハ上の半導体部品の位置再構成
US20260104447A1 (en) Adaptive semiconductor testing method and system for multiple environmental conditions
Bergès et al. Test And Reliability Improvement With Defect-Image Classification And Machine-Learning Algorithms In Semiconductor Industry For Automotive Applications
TW202329279A (zh) 用於重建晶圓上半導體元件的位置之方法及裝置
JPH11176892A (ja) 電子デバイス検査システムおよびそれを用いた電子デバイスの製造方法
JP2004158771A (ja) 半導体装置の欠陥レベル推定方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240229

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20240229

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20240229

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20240604

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20240704

R150 Certificate of patent or registration of utility model

Ref document number: 7518180

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150