JP7492602B2 - 高電力用途のための電力モジュール - Google Patents
高電力用途のための電力モジュール Download PDFInfo
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- JP7492602B2 JP7492602B2 JP2022561447A JP2022561447A JP7492602B2 JP 7492602 B2 JP7492602 B2 JP 7492602B2 JP 2022561447 A JP2022561447 A JP 2022561447A JP 2022561447 A JP2022561447 A JP 2022561447A JP 7492602 B2 JP7492602 B2 JP 7492602B2
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- pin
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- power module
- assembly
- power
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Description
[0010]1つの実施形態では、第1の端子アセンブリの第1のバーおよび少なくとも2つの第1の端子レッグはU字形状を形成し、第2の端子アセンブリの第2のバーおよび少なくとも2つの第2の端子レッグは、U字形状を形成する。
[0022]1つの実施形態では、電力回路は、電力ループおよび少なくとも1つの信号ループを有する。電力ループは、第1の複数の縦型電力デバイスおよび第2の複数の縦型電力デバイスを通過する。電力ループは、少なくとも1つの信号ループから独立している。少なくとも1つの信号ループは、第1の複数の縦型電力デバイスまたは第2の複数の縦型電力デバイスに、少なくとも1つの制御信号を提供し得る。1つの構成では、電力ループは、電力モジュールとのボンドワイヤを通過しない。
[0024]上記に基づいて、本開示は、次世代の炭化ケイ素(SiC)および他の材料系の電力デバイスおよび電力エレクトロニクス用途向けに設計された小型、高電圧、高電流、低インダクタンスのハーフブリッジ電力モジュールに関する。本開示は、デバイスの上部パッドを相互接続し、外部端子としても機能する多機能銅層を備えた、サイズとコストが最適化された電力基板を組み込んだ斬新なレイアウトを利用する。
・パッケージ内(内部レイアウト)とパッケージ外(相互接続)との両方で共通の回路トポロジを提供する。
・伝導損失およびスイッチング損失からの廃熱を、デバイスから除去する。
・高電圧電位間の効果的な電気絶縁を提供する。
・高速スイッチング中の高電圧のオーバーシュートを最小限に抑えるために、低電力ループインダクタンスを提供する。
・ゲート電圧のオーバーシュートと発振を最小限に抑えるために、低い信号ループインダクタンスを達成する。
・電力デバイスの並列化のために内部レイアウトを最適化して、動的および定常状態の電流共有を達成する。
・過熱なしで高電流を流すために、低い電力ループ抵抗を提供する。
・モジュールの並列接続に適した外部端子配置を提供し、回路トポロジへの簡単な配置を特徴付ける。
・電力デバイスの平準化された配置を提供する。
・同じコンポーネントから複数の機能を提供することにより、個々のコンポーネントの使用を制限する。
・設計を通じて、各コンポーネントの機能およびパフォーマンスを最適化する。
・二次動作または終了動作の要件を制限する。
・高収率で知られている従来の、または確立された製造方法を使用する。
・可能であれば、パネル、ストリップ、アレイ、マガジンなどを使用して、バッチ処理または連続処理を使用する。
・ストリップまたはパネルで製造される部品のサイズを決定して、その原材料を最大限に活用するなど、サブコンポーネントの製造方法に基づいて、パッケージのサイズと形状を最適化する。
[00132]本開示は、以下に関するが、これらに限定されない。
・次世代のSiC製品向けに高度に最適化されたハーフブリッジパッケージ設計。
・(より大きなデバイス、またはより多くの並列化によって)より多くのSiC領域を可能にするために、パッケージを長くしたり広げたりすることによって製品を実装できるスケーラブルなレイアウト。
・複数のパッケージを並列接続したり、共通の回路トポロジに配置したりするのを容易にするための、外部端子位置へのモジュール式のアプローチ。
・超低インダクタンスの、平準化された電力ループレイアウト。
・低インダクタンスの、平準化された信号ループレイアウト。
・信号ループの真のケルビン実装。
・左回りまたは右回りの信号ピンの互換性。
・独自部品の使用数を最小限に抑えることによる低コスト化。
・電力基板面積の最小化による低コスト化。
・リードフレームアレイ処理による低コスト化。
・よく採用されているリードフレームアレイ処理とトランスファ成形とを利用した高い製造性。
・パッケージの上側面と底側面に成形された電圧沿面拡張部。
・リードフレームへのデバイス上側面の直接電力接続。
Claims (35)
- 電力モジュールであって、
第1のトレースおよび第2のトレースを有する上面を有する基板と、
電力回路の一部を形成するように電気的に結合された第1の複数の縦型電力デバイスおよび第2の複数の縦型電力デバイスと、
第1の細長バー、少なくとも2つの第1の端子接点、および、前記第1の細長バーと少なくとも2つの前記第1の端子接点との異なる点の間にそれぞれ延在する、少なくとも2つの第1の端子レッグを備える第1の端子アセンブリと、
第2の細長バー、少なくとも2つの第2の端子接点、および、前記第2の細長バーと少なくとも2つの前記第2の端子接点との異なる点の間にそれぞれ延在する、少なくとも2つの第2の端子レッグを備える第2の端子アセンブリとを備え、
前記第1の複数の縦型電力デバイスは、前記第1のトレースと、前記第1の端子アセンブリの前記第1の細長バーの底部との間に電気的および機械的に直接結合され、
前記第2の複数の縦型電力デバイスは、前記第2のトレースと、前記第2の端子アセンブリの前記第2の細長バーの底部との間に電気的および機械的に直接結合される、電力モジュール。 - 前記基板の対向する側面に近接する前記第1のトレースに電気的および機械的に結合された、第3の端子アセンブリおよび第4の端子アセンブリをさらに備える、請求項1に記載の電力モジュール。
- 前記基板は、4つの側面を有し、前記第3の端子アセンブリは、第1の側面にあり、前記第4の端子アセンブリは、前記第1の側面に対向する第2の側面に近接し、前記第1の端子アセンブリは、前記第1の側面と前記第2の側面との間にある第3の側面に近接し、前記第2の端子アセンブリは、前記第1の側面と前記第2の側面との間であり、前記第3の側面に対向する第4の側面に近接する、請求項2に記載の電力モジュール。
- 前記第1の端子アセンブリおよび前記第2の端子アセンブリの少なくとも一部をカプセル化するハウジングを備える、請求項1に記載の電力モジュール。
- 少なくとも2つの前記第1の端子レッグのおのおのは、前記ハウジングの側面部の外に延在し、少なくとも2つの前記第1の端子接点が、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行になるように折り重なり、
少なくとも2つの前記第2の端子レッグのおのおのは、前記ハウジングの側面部の外に延在し、少なくとも2つの前記第2の端子接点が、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行になるように折り重なる、請求項4に記載の電力モジュール。 - 前記基板の対向する側面に近接する前記第1のトレースに電気的および機械的に結合された第3の端子アセンブリおよび第4の端子アセンブリをさらに備え、前記基板は、4つの側面を有し、前記第3の端子アセンブリは、第1の側面に近接し、前記第4の端子アセンブリは、前記第1の側面に対向する第2の側面に近接し、前記第1の端子アセンブリは、前記第1の側面と前記第2の側面との間にある第3の側面に近接し、前記第2の端子アセンブリは、前記第1の側面と前記第2の側面との間であり、前記第3の側面に対向する第4の側面に近接する、請求項5に記載の電力モジュール。
- 前記第3の端子アセンブリは、前記ハウジングの側面部の外に延在する第3の端子レッグと、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行な第3の端子接点とを備え、
前記第4の端子アセンブリは、前記ハウジングの側面部の外に延在する第4の端子レッグと、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行な第4の端子接点とを備える、請求項6に記載の電力モジュール。 - 前記ハウジングの前記上面は、前記電力モジュールの特定の導電要素間の表面距離を効果的に拡張する沿面拡張部として機能する複数の溝を備える、請求項5に記載の電力モジュール。
- 前記第1の端子アセンブリの前記第1の細長バーおよび少なくとも2つの前記第1の端子レッグは、U字形状を形成し、前記第2の端子アセンブリの前記第2の細長バーおよび少なくとも2つの前記第2の端子レッグは、U字形状を形成する、請求項1に記載の電力モジュール。
- 第1のピンバーと、前記第1のピンバーから延在する少なくとも1つの第1のピンレッグとを備える第1のピンアセンブリであって、前記第1のピンバーは、前記第1の細長バーに隣接して、少なくとも2つの前記第1の端子レッグの間に配置される、第1のピンアセンブリと、
第2のピンバーと、前記第2のピンバーから延在する少なくとも1つの第2のピンレッグとを備える第2のピンアセンブリであって、前記第2のピンバーは、前記第2の細長バーに隣接して、少なくとも2つの前記第2の端子レッグの間に配置される、第2のピンアセンブリとをさらに備える、請求項9に記載の電力モジュール。 - 少なくとも1つの前記第1のピンレッグは、2つの第1のピンレッグを備え、少なくとも1つの前記第2のピンレッグは、2つの第2のピンレッグを備え、前記電力モジュールはさらに、
第3のピンバーと、前記第3のピンバーから延在する少なくとも1つの第3のピンレッグとを備える第3のピンアセンブリであって、前記第3のピンバーは、前記第1のピンバーに隣接して、2つの前記第1のピンレッグの間に配置される、第3のピンアセンブリと、
第4のピンバーと、前記第4のピンバーから延在する少なくとも1つの第4のピンレッグとを備える第4のピンアセンブリであって、前記第4のピンバーは、前記第2のピンバーに隣接して、2つの前記第2のピンレッグの間に配置される、第4のピンアセンブリとを備える、請求項10に記載の電力モジュール。 - 少なくとも1つの前記第3のピンレッグは、2つの第3のピンレッグを備え、少なくとも1つの前記第4のピンレッグは、2つの第4のピンレッグを備える、請求項11に記載の電力モジュール。
- 前記第1のピンアセンブリは、第1のボンドワイヤを介して、前記第1の複数の縦型電力デバイスの第1の接点に電気的に接続され、前記第2のピンアセンブリは、第2のボンドワイヤを介して、前記第2の複数の縦型電力デバイスの第2の接点に電気的に接続され、前記第3のピンアセンブリは、第3のボンドワイヤを介して、前記第1の複数の縦型電力デバイスの第3の接点に電気的に接続され、前記第4のピンアセンブリは、第4のボンドワイヤを介して、前記第2の複数の縦型電力デバイスの第4の接点に電気的に接続される、請求項11に記載の電力モジュール。
- 前記第1の端子アセンブリ、前記第2の端子アセンブリ、前記第1のピンアセンブリ、および前記第2のピンアセンブリの少なくとも一部をカプセル化するハウジングを備え、少なくとも1つの前記第1のピンレッグおよび少なくとも1つの前記第2のピンレッグは、前記ハウジングのそれぞれの側面部の外に延在し、次に、前記ハウジングの上端に向かって87度から93度の角度で上向きに曲がる、請求項11に記載の電力モジュール。
- 前記第1の複数の縦型電力デバイスおよび前記第2の複数の縦型電力デバイスは、電界効果トランジスタであり、
前記第1のピンアセンブリは、前記第1の複数の縦型電力デバイスのゲート接点またはソース接点のうちの1つに電気的に結合され、
前記第2のピンアセンブリは、前記第2の複数の縦型電力デバイスのゲート接点またはソース接点のうちの1つに電気的に結合される、請求項11に記載の電力モジュール。 - 前記第3のピンアセンブリは、前記第1の複数の縦型電力デバイスの前記ゲート接点またはソース接点のうちの他方に電気的に結合され、
前記第4のピンアセンブリは、前記第2の複数の縦型電力デバイスの前記ゲート接点またはソース接点のうちの他方に電気的に結合される、請求項15に記載の電力モジュール。 - 前記第1の複数の縦型電力デバイスは、互いに並列に電気的に結合された少なくとも3つの第1の縦型トランジスタを備え、前記第2の複数の縦型電力デバイスは、互いに並列に電気的に結合された少なくとも3つの第2の縦型トランジスタを備える、請求項1に記載の電力モジュール。
- 少なくとも3つの前記第1の縦型トランジスタおよび少なくとも3つの前記第2の縦型トランジスタは、炭化ケイ素トランジスタであり、前記基板は、炭化ケイ素を備える、請求項17に記載の電力モジュール。
- 前記第1の複数の縦型電力デバイスおよび前記第2の複数の縦型電力デバイスは、電力電界効果トランジスタを備え、前記電力回路は、ハーフHブリッジ回路である、請求項1に記載の電力モジュール。
- 前記第1の端子アセンブリはさらに、前記第1の細長バーから前記第2のトレースまで延在する複数のジャンパを備え、前記複数のジャンパは、前記第2のトレースに電気的および機械的に接続できる、請求項1に記載の電力モジュール。
- 前記第1の端子アセンブリおよび前記第2の端子アセンブリは、共通のリードフレームのコンポーネントである、請求項1に記載の電力モジュール。
- 前記電力回路は、電力ループおよび少なくとも1つの信号ループを備え、
前記電力ループは、前記第1の複数の縦型電力デバイスおよび前記第2の複数の縦型電力デバイスを通過する、請求項1に記載の電力モジュール。 - 前記電力ループは、少なくとも1つの前記信号ループから独立している、請求項22に記載の電力モジュール。
- 少なくとも1つの前記信号ループは、前記第1の複数の縦型電力デバイスまたは前記第2の複数の縦型電力デバイスに、少なくとも1つの制御信号を提供する、請求項23に記載の電力モジュール。
- 前記電力ループは、前記電力モジュールのボンドワイヤを通過しない、請求項22に記載の電力モジュール。
- 前記第1の端子アセンブリと前記第2の端子アセンブリとの両方が、少なくとも1つの軸に沿って対称である、請求項1に記載の電力モジュール。
- 前記基板、前記第1の複数の縦型電力デバイス、および前記第2の複数の縦型電力デバイスは、炭化ケイ素を備える、請求項1に記載の電力モジュール。
- 電力モジュールであって、
第1のトレースおよび第2のトレースを有する上面を有する基板と、
電力回路の一部を形成するように電気的に結合された第1の複数の縦型電力デバイスおよび第2の複数の縦型電力デバイスと、
第1の細長バー、少なくとも2つの第1の端子接点、および、前記第1の細長バーと少なくとも2つの前記第1の端子接点との異なる点の間にそれぞれ延在する、少なくとも2つの第1の端子レッグを備える第1の端子アセンブリと、
第2の細長バー、少なくとも2つの第2の端子接点、および、前記第2の細長バーと少なくとも2つの前記第2の端子接点との異なる点の間にそれぞれ延在する、少なくとも2つの第2の端子レッグを備える第2の端子アセンブリと、
前記基板の対向する側面に近接する前記第1のトレースに電気的および機械的に結合された、第3の端子アセンブリおよび第4の端子アセンブリと、
前記第1の端子アセンブリ、前記第2の端子アセンブリ、前記第3の端子アセンブリ、および前記第4の端子アセンブリの少なくとも一部をカプセル化するハウジングとを備え、前記基板は4つの側面を有し、前記第3の端子アセンブリは、第1の側面にあり、前記第4の端子アセンブリは、前記第1の側面に対向する第2の側面に近接し、前記第1の端子アセンブリは、前記第1の側面と前記第2の側面との間にある第3の側面に近接し、前記第2の端子アセンブリは、前記第1の側面と前記第2の側面との間であり、前記第3の側面に対向する第4の側面に近接し、
前記第1の複数の縦型電力デバイスは、前記第1のトレースと、前記第1の端子アセンブリの前記第1の細長バーの底部との間に電気的および機械的に直接結合され、
前記第2の複数の縦型電力デバイスは、前記第2のトレースと、前記第2の端子アセンブリの前記第2の細長バーの底部との間に電気的および機械的に直接結合される、電力モジュール。 - 少なくとも2つの前記第1の端子レッグのおのおのは、前記ハウジングの側面部の外に延在し、少なくとも2つの前記第1の端子接点が、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行になるように折り重なり、
少なくとも2つの前記第2の端子レッグのおのおのは、前記ハウジングの側面部の外に延在し、少なくとも2つの前記第2の端子接点が、前記ハウジングの上端部の上方を、前記ハウジングの上端部と平行に延在するように折り重なる、請求項28に記載の電力モジュール。 - 前記第3の端子アセンブリは、前記ハウジングの側面部の外に延在する第3の端子レッグと、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行な第3の端子接点とを備え、
前記第4の端子アセンブリは、前記ハウジングの側面部の外に延在する第4の端子レッグと、前記ハウジングの上端部の上方に延在し、前記ハウジングの上端部と平行な第4の端子接点とを備える、請求項29に記載の電力モジュール。 - 第1のピンバーと、前記第1のピンバーから延在する少なくとも1つの第1のピンレッグとを備える第1のピンアセンブリであって、前記第1のピンバーは、前記第1の細長バーに隣接して、少なくとも2つの前記第1の端子レッグの間に配置される、第1のピンアセンブリと、
第2のピンバーと、前記第2のピンバーから延在する少なくとも1つの第2のピンレッグとを備える第2のピンアセンブリであって、前記第2のピンバーは、前記第2の細長バーに隣接して、少なくとも2つの前記第2の端子レッグの間に配置される、第2のピンアセンブリとをさらに備える、請求項30に記載の電力モジュール。 - 少なくとも1つの前記第1のピンレッグは、2つの第1のピンレッグを備え、少なくとも1つの前記第2のピンレッグは、2つの第2のピンレッグを備え、前記電力モジュールはさらに、
第3のピンバーと、前記第3のピンバーから延在する少なくとも1つの第3のピンレッグとを備える第3のピンアセンブリであって、前記第3のピンバーは、前記第1のピンバーに隣接して、2つの前記第1のピンレッグの間に配置される、第3のピンアセンブリと、
第4のピンバーと、前記第4のピンバーから延在する少なくとも1つの第4のピンレッグとを備える第4のピンアセンブリであって、前記第4のピンバーは、前記第2のピンバーに隣接して、2つの前記第2のピンレッグの間に配置される、第4のピンアセンブリとを備える、請求項31に記載の電力モジュール。 - 前記電力回路は、電力ループおよび少なくとも1つの信号ループを備え、
前記電力ループは、前記第1の複数の縦型電力デバイスおよび前記第2の複数の縦型電力デバイスを通過し、
前記電力ループは、少なくとも1つの前記信号ループから独立しており、
少なくとも1つの前記信号ループは、前記第1の複数の縦型電力デバイスまたは前記第2の複数の縦型電力デバイスに、少なくとも1つの制御信号を提供する、請求項32に記載の電力モジュール。 - 前記電力ループは、前記電力モジュールのボンドワイヤを通過しない、請求項33に記載の電力モジュール。
- 前記基板、前記第1の複数の縦型電力デバイス、および前記第2の複数の縦型電力デバイスは、炭化ケイ素を備える、請求項28に記載の電力モジュール。
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