JP7432071B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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JP7432071B2
JP7432071B2 JP2018528801A JP2018528801A JP7432071B2 JP 7432071 B2 JP7432071 B2 JP 7432071B2 JP 2018528801 A JP2018528801 A JP 2018528801A JP 2018528801 A JP2018528801 A JP 2018528801A JP 7432071 B2 JP7432071 B2 JP 7432071B2
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layer
doping concentration
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channel
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JP2018537859A5 (cg-RX-API-DMAC7.html
JP2018537859A (ja
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バルトルフ，ホルガー
ラヒモ，ムナフ
クノール，ラース
ミハイラ，アンドレイ
ミナミサワ，レナート
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Hitachi Energy Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H01L21/0465—Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/0485—Ohmic electrodes
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D12/01—Manufacture or treatment
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    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
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    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
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    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
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    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
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    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
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    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
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    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/152—Source regions of DMOS transistors
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    • H10D62/149—Source or drain regions of field-effect devices
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    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
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    • H10D62/221—Channel regions of field-effect devices of FETs
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    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
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    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
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    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

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  • Crystallography & Structural Chemistry (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Composite Materials (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2018528801A 2015-12-02 2016-10-28 半導体装置およびその製造方法 Active JP7432071B2 (ja)

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EP15197558.8 2015-12-02
EP15197558.8A EP3176812A1 (en) 2015-12-02 2015-12-02 Semiconductor device and method for manufacturing such a semiconductor device
PCT/EP2016/076085 WO2017092940A1 (en) 2015-12-02 2016-10-28 Semiconductor device and method for manufacturing such a semiconductor device

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JP2021002624A (ja) * 2019-06-24 2021-01-07 株式会社デンソー 窒化物半導体装置
CN112582461B (zh) * 2019-09-30 2024-05-10 比亚迪半导体股份有限公司 平面栅SiCMOSFET及其制造方法
CN112038234B (zh) * 2020-08-13 2022-11-22 杭州芯迈半导体技术有限公司 SiC MOSFET器件及其制造方法
JP7779076B2 (ja) * 2021-03-08 2025-12-03 富士電機株式会社 窒化物半導体装置の製造方法及び窒化物半導体装置
JP7531446B2 (ja) 2021-04-15 2024-08-09 三菱電機株式会社 炭化珪素半導体装置の製造方法
CN117597786A (zh) * 2021-09-29 2024-02-23 华为技术有限公司 自对准通道金属氧化物半导体（mos）器件及其制造方法
WO2025075681A1 (en) * 2023-10-05 2025-04-10 Microchip Technology Incorporated Transistor and method for manufacturing same
CN117133800B (zh) * 2023-10-25 2024-03-26 合肥海图微电子有限公司 一种绝缘栅双极型晶体管及其制作方法
CN118538613B (zh) * 2024-07-15 2025-01-28 扬州扬杰电子科技股份有限公司 一种降低导通电阻的平面栅mosfet及其制备方法
CN119997568B (zh) * 2025-04-16 2025-07-11 杭州谱析光晶半导体科技有限公司 一种具有三层光罩的SiC VDMOSFET器件及基制备工艺

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JP2007242925A (ja) 2006-03-09 2007-09-20 Mitsubishi Electric Corp 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
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JP2015191923A (ja) 2014-03-27 2015-11-02 住友電気工業株式会社 炭化珪素半導体装置およびその製造方法

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EP3176812A1 (en) 2017-06-07
EP3384522A1 (en) 2018-10-10
JP2018537858A (ja) 2018-12-20
WO2017092939A1 (en) 2017-06-08
EP3384523A1 (en) 2018-10-10
EP3384523B1 (en) 2019-07-17
CN108604551B (zh) 2022-09-06
US10553437B2 (en) 2020-02-04
WO2017092940A1 (en) 2017-06-08
CN108604552A (zh) 2018-09-28
JP6807390B2 (ja) 2021-01-06
JP2018537859A (ja) 2018-12-20
US20180286963A1 (en) 2018-10-04
EP3384522B1 (en) 2019-07-17
US10361082B2 (en) 2019-07-23
US20180350602A1 (en) 2018-12-06
CN108604551A (zh) 2018-09-28
CN108604552B (zh) 2022-03-22

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