JP7323847B2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP7323847B2
JP7323847B2 JP2022502649A JP2022502649A JP7323847B2 JP 7323847 B2 JP7323847 B2 JP 7323847B2 JP 2022502649 A JP2022502649 A JP 2022502649A JP 2022502649 A JP2022502649 A JP 2022502649A JP 7323847 B2 JP7323847 B2 JP 7323847B2
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power supply
cell
wiring
wirings
power
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Japanese (ja)
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JPWO2021171408A5 (https=
JPWO2021171408A1 (https=
Inventor
功弥 祖父江
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Socionext Inc
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Socionext Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/921—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/931—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the dispositions of the protective arrangements

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  • Semiconductor Integrated Circuits (AREA)
JP2022502649A 2020-02-26 2020-02-26 半導体集積回路装置 Active JP7323847B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/007651 WO2021171408A1 (ja) 2020-02-26 2020-02-26 半導体集積回路装置

Publications (3)

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JPWO2021171408A1 JPWO2021171408A1 (https=) 2021-09-02
JPWO2021171408A5 JPWO2021171408A5 (https=) 2022-10-20
JP7323847B2 true JP7323847B2 (ja) 2023-08-09

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JP2022502649A Active JP7323847B2 (ja) 2020-02-26 2020-02-26 半導体集積回路装置

Country Status (3)

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US (1) US12484312B2 (https=)
JP (1) JP7323847B2 (https=)
WO (1) WO2021171408A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026074865A1 (ja) * 2024-10-04 2026-04-09 株式会社ソシオネクスト 半導体集積回路装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246470A (ja) 2001-02-13 2002-08-30 Seiko Instruments Inc 半導体装置
JP2015532530A (ja) 2012-09-26 2015-11-09 ベイサンド インコーポレーテッドＢａｙｓａｎｄ Ｉｎｃ． 集積回路に用いるフレキシブルで実装効率の良い入出力回路素子
WO2018180010A1 (ja) 2017-03-29 2018-10-04 株式会社ソシオネクスト 半導体集積回路装置

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3038896B2 (ja) * 1990-11-13 2000-05-08 日本電気株式会社 半導体装置
JP2920013B2 (ja) * 1991-12-26 1999-07-19 川崎製鉄株式会社 半導体静電保護回路
US7687858B2 (en) * 1999-01-15 2010-03-30 Broadcom Corporation System and method for ESD protection
US6765245B2 (en) * 2002-03-25 2004-07-20 Bae Systems Information And Electronic Systems Integration Inc. Gate array core cell for VLSI ASIC devices
US7401302B2 (en) * 2004-04-29 2008-07-15 Taiwan Semiconductor Manufacturing Company Ltd. System on chip development with reconfigurable multi-project wafer technology
US7305646B2 (en) * 2005-05-09 2007-12-04 Lsi Corporation Relocatable mixed-signal functions
US7272802B2 (en) * 2005-05-11 2007-09-18 Lsi Corporation R-cells containing CDM clamps
US7373622B2 (en) * 2005-05-13 2008-05-13 Lsi Logic Corporation Relocatable built-in self test (BIST) elements for relocatable mixed-signal elements
US7478354B2 (en) * 2005-05-20 2009-01-13 Lsi Corporation Use of configurable mixed-signal building block functions to accomplish custom functions
JP2008078354A (ja) * 2006-09-21 2008-04-03 Renesas Technology Corp 半導体装置
US7882453B2 (en) * 2007-10-17 2011-02-01 Rapid Bridge Llc Semiconductor device metal programmable pooling and dies
JP5356904B2 (ja) * 2009-04-27 2013-12-04 パナソニック株式会社 半導体集積回路チップ
US7969186B2 (en) * 2009-06-02 2011-06-28 Mips Technologies Apparatus and method for forming a mixed signal circuit with fully customizable analog cells and programmable interconnect
JP2013021249A (ja) * 2011-07-14 2013-01-31 Toshiba Corp 半導体集積装置
US9166594B2 (en) 2012-05-28 2015-10-20 Baysand Inc. Flexible, space-efficient I/O circuitry for integrated circuits
US9577640B1 (en) 2012-05-28 2017-02-21 Baysand Inc. Flexible, space-efficient I/O circuitry for integrated circuits
KR20140108982A (ko) * 2013-03-04 2014-09-15 삼성전자주식회사 메모리 장치 및 그 제조 방법
US10396550B2 (en) * 2016-09-30 2019-08-27 Texas Instruments Incorporated ESD protection charge pump active clamp for low-leakage applications
CN110637358B (zh) * 2017-05-15 2022-09-23 株式会社索思未来 半导体集成电路装置
CN112567507B (zh) * 2018-08-28 2024-07-05 株式会社索思未来 半导体集成电路装置
US12464826B2 (en) * 2021-10-29 2025-11-04 Renesas Electronics Corporation Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246470A (ja) 2001-02-13 2002-08-30 Seiko Instruments Inc 半導体装置
JP2015532530A (ja) 2012-09-26 2015-11-09 ベイサンド インコーポレーテッドＢａｙｓａｎｄ Ｉｎｃ． 集積回路に用いるフレキシブルで実装効率の良い入出力回路素子
WO2018180010A1 (ja) 2017-03-29 2018-10-04 株式会社ソシオネクスト 半導体集積回路装置
US20190385945A1 (en) 2017-03-29 2019-12-19 Socionext Inc. Semiconductor integrated circuit device

Also Published As

Publication number Publication date
US12484312B2 (en) 2025-11-25
WO2021171408A1 (ja) 2021-09-02
JPWO2021171408A1 (https=) 2021-09-02
US20220415882A1 (en) 2022-12-29

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