JP7253946B2 - 配線基板及びその製造方法、半導体パッケージ - Google Patents

配線基板及びその製造方法、半導体パッケージ Download PDF

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Publication number
JP7253946B2
JP7253946B2 JP2019053623A JP2019053623A JP7253946B2 JP 7253946 B2 JP7253946 B2 JP 7253946B2 JP 2019053623 A JP2019053623 A JP 2019053623A JP 2019053623 A JP2019053623 A JP 2019053623A JP 7253946 B2 JP7253946 B2 JP 7253946B2
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Japan
Prior art keywords
layer
wiring
metal layer
insulating layer
pad
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JP2019053623A
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Japanese (ja)
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JP2020155631A5 (enExample
JP2020155631A (ja
Inventor
智晃 町田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2019053623A priority Critical patent/JP7253946B2/ja
Priority to US16/811,731 priority patent/US11171081B2/en
Publication of JP2020155631A publication Critical patent/JP2020155631A/ja
Priority to US17/497,158 priority patent/US11594478B2/en
Publication of JP2020155631A5 publication Critical patent/JP2020155631A5/ja
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Publication of JP7253946B2 publication Critical patent/JP7253946B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2019053623A 2019-03-20 2019-03-20 配線基板及びその製造方法、半導体パッケージ Active JP7253946B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2019053623A JP7253946B2 (ja) 2019-03-20 2019-03-20 配線基板及びその製造方法、半導体パッケージ
US16/811,731 US11171081B2 (en) 2019-03-20 2020-03-06 Wiring substrate, semiconductor package and method of manufacturing wiring substrate
US17/497,158 US11594478B2 (en) 2019-03-20 2021-10-08 Wiring substrate, semiconductor package and method of manufacturing wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019053623A JP7253946B2 (ja) 2019-03-20 2019-03-20 配線基板及びその製造方法、半導体パッケージ

Publications (3)

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JP2020155631A JP2020155631A (ja) 2020-09-24
JP2020155631A5 JP2020155631A5 (enExample) 2021-12-23
JP7253946B2 true JP7253946B2 (ja) 2023-04-07

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JP (1) JP7253946B2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11380609B2 (en) * 2018-05-21 2022-07-05 Intel Corporation Microelectronic assemblies having conductive structures with different thicknesses on a core substrate
JP2021177515A (ja) * 2020-05-07 2021-11-11 富士通株式会社 基板ユニット
JP7799979B2 (ja) * 2020-10-27 2026-01-16 味の素株式会社 プリント配線板及びその製造方法
CN114695126A (zh) * 2020-12-30 2022-07-01 江苏中科智芯集成科技有限公司 一种半导体芯片封装方法及封装结构
US12484157B2 (en) * 2021-03-18 2025-11-25 Panasonic Intellectual Property Management Co., Ltd. Adhesive for provisionally fixing electronic component to solder precoat and method for producing electronic component mounted substrate
JP7622605B2 (ja) * 2021-10-13 2025-01-28 三菱電機株式会社 半導体装置および半導体装置の製造方法
US20240178155A1 (en) * 2022-11-30 2024-05-30 Texas Instruments Incorporated Multilevel package substrate with box shield
JP2024159297A (ja) 2023-04-28 2024-11-08 日東電工株式会社 配線回路基板およびその製造方法
WO2024228284A1 (ja) * 2023-05-01 2024-11-07 株式会社村田製作所 配線基板、電子モジュール、及び配線基板の製造方法
JP2025064739A (ja) * 2023-10-06 2025-04-17 新光電気工業株式会社 配線基板

Citations (2)

* Cited by examiner, † Cited by third party
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JP2005311245A (ja) 2004-04-26 2005-11-04 Fujikura Ltd ビアホール形成方法
JP2017073520A (ja) 2015-10-09 2017-04-13 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法

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TWI495051B (zh) * 2011-07-08 2015-08-01 欣興電子股份有限公司 無核心層之封裝基板及其製法
US9691686B2 (en) * 2014-05-28 2017-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Contact pad for semiconductor device
TWI590350B (zh) * 2016-06-30 2017-07-01 欣興電子股份有限公司 線路重分佈結構的製造方法與線路重分佈結構單元
US10043740B2 (en) * 2016-07-12 2018-08-07 Intel Coporation Package with passivated interconnects
JP7112962B2 (ja) * 2016-11-28 2022-08-04 三井金属鉱業株式会社 多層配線板の製造方法
JP6496882B2 (ja) * 2016-11-28 2019-04-10 三井金属鉱業株式会社 粘着シート及びその剥離方法
JP6924084B2 (ja) * 2017-06-26 2021-08-25 新光電気工業株式会社 配線基板
US10535590B2 (en) * 2017-12-29 2020-01-14 Intel Corporation Multi-layer solder resists for semiconductor device package surfaces and methods of assembling same
EP3732710A4 (en) * 2017-12-30 2021-11-17 INTEL Corporation GALVANIC CORROSION PROTECTION FOR SEMI-CONDUCTOR HOUSING
US20200075468A1 (en) * 2018-09-04 2020-03-05 International Business Machines Corporation Dedicated Integrated Circuit Chip Carrier Plane Connected to Decoupling Capacitor(s)
US11302619B2 (en) * 2019-10-01 2022-04-12 Advanced Semiconductor Engineering, Inc. Device structure and method for manufacturing the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005311245A (ja) 2004-04-26 2005-11-04 Fujikura Ltd ビアホール形成方法
JP2017073520A (ja) 2015-10-09 2017-04-13 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法

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US11171081B2 (en) 2021-11-09
US20220044990A1 (en) 2022-02-10
JP2020155631A (ja) 2020-09-24
US20200303293A1 (en) 2020-09-24
US11594478B2 (en) 2023-02-28

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