JP7110902B2 - Multilayer Ceramic Capacitor Inspection Method and Multilayer Ceramic Capacitor Manufacturing Method - Google Patents

Description

The present invention relates to a multilayer ceramic capacitor inspection method and a multilayer ceramic capacitor manufacturing method.

2. Description of the Related Art Conventionally, multilayer ceramic capacitors have been used in various electronic devices. A multilayer ceramic capacitor usually has a ceramic body and first and second internal electrodes arranged in the ceramic body and opposed to each other with a ceramic portion interposed therebetween. In a multilayer ceramic capacitor, if a structural defect such as delamination is present in the ceramic element body, insulation failure may occur when a voltage is applied. For this reason, the manufactured multilayer ceramic capacitors are inspected for structural defects before shipment. As an example of an inspection method, Patent Document 1 proposes a method of inspecting for structural defects that may cause insulation failure by applying a high voltage between first and second internal electrodes. When a high voltage is applied between the first and second internal electrodes, dielectric breakdown occurs in the multilayer ceramic capacitor having structural defects. As a result, the electric resistance of the laminated ceramic capacitor decreases, and the current flowing through the laminated ceramic capacitor increases. Therefore, a structural defect of the multilayer ceramic capacitor can be inspected by monitoring the current flowing between the first and second internal electrodes after applying a high voltage between the first and second internal electrodes.

JP-A-2001-35758

However, when a high voltage is applied to a multilayer ceramic capacitor when inspecting structural defects, distortion of ceramics called electrostriction becomes noticeable. For this reason, new cracks may occur in the multilayer ceramic capacitor. These newly generated cracks are generated during inspection for structural defects, and even if cracks are generated, dielectric breakdown may not occur during inspection. However, if cracks are present, the cracks may grow and insulation failure may occur during use of the multilayer ceramic capacitor. Therefore, it is necessary to detect cracks generated in the inspection process.

However, the inspection method described in Patent Document 1 cannot detect cracks generated when a high voltage is applied to inspect for structural defects.

A main object of the present invention is to provide an inspection method for a multilayer ceramic capacitor that can detect new cracks generated during inspection for structural defects with a high degree of certainty.

In the method for inspecting a laminated ceramic capacitor according to the present invention, a measuring step of measuring a current value flowing through the laminated ceramic capacitor while applying a voltage to the laminated ceramic capacitor is performed. A judgment step is performed for judging that the multilayer ceramic capacitor in which an abnormal current is detected in the measurement step is abnormal. In the measuring step, a voltage is applied to the multilayer ceramic capacitor so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value when no structural defect exists.

In a specific aspect of the method for inspecting a multilayer ceramic capacitor according to the present invention, in the measurement step, the multilayer ceramic capacitor is controlled so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value when no structural defect exists. The applied voltage is gradually increased to a voltage higher than the rated voltage of the multilayer ceramic capacitor.

In another specific aspect of the method for inspecting a multilayer ceramic capacitor according to the present invention, in the measuring step, the multilayer ceramic capacitor is measured so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value when no structural defect exists. is gradually decreased from a voltage higher than the rated voltage of the multilayer ceramic capacitor to the rated voltage or less.

In another specific aspect of the method for inspecting a multilayer ceramic capacitor according to the present invention, in the measuring step, the voltage applied to the multilayer ceramic capacitor is increased to a voltage higher than the rated voltage of the multilayer ceramic capacitor, and then at the voltage The voltage is held and then lowered to a voltage equal to or lower than the rated voltage of the multilayer ceramic capacitor.

In still another specific aspect of the method for inspecting a laminated ceramic capacitor according to the present invention, in the measuring step, a cycle of applying one of the positive voltage and the negative voltage to the laminated ceramic capacitor and then applying the other of the positive voltage and the negative voltage is applied. at least once.

In the method for manufacturing a laminated ceramic capacitor according to the present invention, a laminated ceramic capacitor is produced. A measurement step of measuring a value of current flowing through the multilayer ceramic capacitor while applying a voltage to the multilayer ceramic capacitor is performed. A judgment step is performed for judging that the multilayer ceramic capacitor in which an abnormal current is detected in the measurement step is abnormal. In the measuring step, a voltage is applied to the multilayer ceramic capacitor so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value when no structural defect exists.

According to the present invention, it is possible to provide a method for inspecting a multilayer ceramic capacitor that can detect newly generated cracks with high certainty during inspection for structural defects.

1 is a schematic perspective view of a laminated ceramic capacitor in one embodiment of the present invention; FIG. Figure 2 is a schematic cross-sectional view along line II-II of Figure 1; 4 is a graph showing a voltage (chain line) applied to a multilayer ceramic capacitor in a measurement step in one embodiment of the present invention and a current (solid line) measured when the multilayer ceramic capacitor is a non-defective product. 4 is a graph showing a voltage (chain line) applied to a multilayer ceramic capacitor in a measurement step in one embodiment of the present invention and a current (solid line) measured when a short circuit failure occurs in the multilayer ceramic capacitor. 4 is a graph showing a voltage (chain line) applied to a multilayer ceramic capacitor in a measurement step in one embodiment of the present invention and a current (solid line) measured when a crack occurs in the multilayer ceramic capacitor. 4 is a graph showing the voltage (chain line) applied to the multilayer ceramic capacitor in the measurement process in the first modified example; 9 is a graph showing the voltage (chain line) applied to the multilayer ceramic capacitor in the measurement process in the second modified example; FIG. 11 is a graph showing voltage (chain line) applied to the multilayer ceramic capacitor in the measurement step in the fourth modified example; FIG. FIG. 10 is a graph showing voltage (chain line) applied to the multilayer ceramic capacitor in the measurement step in the fifth modified example; FIG. FIG. 12 is a graph showing voltage (chain line) applied to the multilayer ceramic capacitor in the measurement step in the seventh modified example; FIG. FIG. 12 is a graph showing voltage (chain line) applied to the multilayer ceramic capacitor in the measurement step in the eighth modified example; FIG. FIG. 11 is a graph showing voltage (chain line) applied to a multilayer ceramic capacitor in a measurement step in a ninth modified example; FIG.

An example of a preferred embodiment of the present invention will be described below. However, the following embodiments are merely examples. The present invention is by no means limited to the following embodiments.

In each drawing referred to in the embodiments and the like, members having substantially the same functions are referred to with the same reference numerals. Moreover, the drawings referred to in the embodiments and the like are described schematically. The dimensional ratios and the like of the objects drawn in the drawings may differ from the dimensional ratios and the like of the actual objects. The dimensional ratios of objects and the like may differ between drawings. Specific dimensional ratios of objects should be determined with reference to the following description.

FIG. 1 is a schematic perspective view of a laminated ceramic capacitor according to this embodiment. FIG. 2 is a schematic cross-sectional view along line II-II of FIG. First, an example of a multilayer ceramic capacitor to be inspected will be described with reference to FIGS. 1 and 2. FIG. In the present invention, the laminated ceramic capacitor is not particularly limited to the laminated ceramic capacitor 1 described below. In the present invention, the multilayer ceramic capacitor is not particularly limited as long as it has a ceramic body.

(Structure of Multilayer Ceramic Capacitor 1)
As shown in FIGS. 1 and 2, a multilayer ceramic capacitor 1 includes a ceramic body 10. As shown in FIGS. The ceramic body 10 has a substantially rectangular parallelepiped shape. The ceramic body 10 has first and second main surfaces 10a and 10b, first and second side surfaces 10c and 10d, and first and second end surfaces 10e and 10f (see FIG. 2). . The first and second main surfaces 10a, 10b extend along the length direction L and the width direction W, respectively. The first main surface 10a and the second main surface 10b are parallel to each other. The first and second side surfaces 10c, 10d extend along the length direction L and the thickness direction T, respectively. The first side 10c and the second side 10d are parallel to each other. The first and second end surfaces 10e and 10f extend along the width direction W and the thickness direction T, respectively. The first end surface 10e and the second end surface 10f are parallel to each other.

The ceramic body 10 can be made of, for example, a material containing dielectric ceramic as a main component. Specific examples of dielectric ceramics include BaTiO ₃ , CaTiO ₃ , SrTiO ₃ and CaZrO ₃ . Sub-components such as Mn compounds, Mg compounds, Si compounds, Co compounds, Ni compounds, and rare earth compounds may be appropriately added to the ceramic body 10 .

Note that the “substantially rectangular parallelepiped” includes a rectangular parallelepiped with chamfered corners and edges, and a rectangular parallelepiped with rounded corners and edges.

As shown in FIG. 2, a plurality of internal electrodes 11 and 12 are provided inside the ceramic body 10 . A plurality of internal electrodes 11 and 12 are laminated along the thickness direction T. As shown in FIG. Each internal electrode 11, 12 is provided parallel to the length direction L and the width direction W. As shown in FIG. Inside the ceramic body 10, the internal electrodes 11 and the internal electrodes 12 are alternately provided along the thickness direction T. As shown in FIG. A ceramic portion 15 is arranged between the internal electrodes 11 and 12 adjacent to each other in the thickness direction T. As shown in FIG. That is, the internal electrodes 11 and 12 that are adjacent in the thickness direction T face each other with the ceramic portion 15 interposed therebetween.

The internal electrode 11 is drawn out to the first end face 10e. An external electrode 13 is provided on the first end face 10e. The external electrodes 13 are electrically connected to the internal electrodes 11 .

The internal electrode 12 is drawn out to the second end face 10f. An external electrode 14 is provided on the second end face 10f. The external electrodes 14 are electrically connected to the internal electrodes 12 .

The internal electrodes 11, 12 and the external electrodes 13, 14 can be made of suitable conductive materials such as Ni, Cu, Ag, Pd, Au, Ag--Pd alloy.

(Manufacturing method of multilayer ceramic capacitor 1)
When manufacturing the laminated ceramic capacitor 1, first, the laminated ceramic capacitor 1 is produced. After that, an inspection is performed by the following inspection method. Based on the inspection results, the products are sorted into non-defective products and defective products. By doing so, it is possible to manufacture a plurality of multilayer ceramic capacitors with a low percentage of multilayer ceramic capacitors having poor insulation or newly generated cracks during inspection.

(Inspection method for multilayer ceramic capacitor 1)
In the method for inspecting the multilayer ceramic capacitor 1 according to the present embodiment, it is possible not only to distinguish multilayer ceramic capacitors having structural defects that occurred before inspection, but also to detect cracks newly generated during inspection with a high degree of certainty. .

Specifically, while applying a voltage to the laminated ceramic capacitor 1, the current value flowing through the laminated ceramic capacitor 1 is measured (measurement step). In the measurement process, the multilayer ceramic capacitor 1 in which an abnormal current is detected is judged to be abnormal (defective product) (judgment process). In the measurement step, a voltage is applied to the multilayer ceramic capacitor 1 so that the current flowing through the multilayer ceramic capacitor 1 is less than a predetermined current value (limit current value) when there is no structural defect in the multilayer ceramic capacitor 1. Predetermined current values are values such as 10 mA, 30 mA, and 50 mA, for example. The predetermined current value is preferably a current limit value set by a mechanism for preventing overcurrent provided on the power source or circuit used for the inspection.

For example, when the voltage applied to a laminated ceramic capacitor is increased at once, a large current flows through the laminated ceramic capacitor. Therefore, the current flowing through the multilayer ceramic capacitor 1 may reach the limit current value. On the other hand, in the present embodiment, the voltage applied to the multilayer ceramic capacitor 1 ranges from a voltage lower than the rated voltage of the multilayer ceramic capacitor 1 (for example, 0 V) to a voltage higher than the rated voltage of the multilayer ceramic capacitor 1 (V1). Gradually increase. Also, the voltage applied to the multilayer ceramic capacitor 1 is gradually decreased from a voltage (V1) higher than the rated voltage of the multilayer ceramic capacitor 1 to a voltage lower than the rated voltage of the multilayer ceramic capacitor 1 (for example, 0V). More specifically, in the present embodiment, the voltage applied to the multilayer ceramic capacitor 1 is changed from a voltage lower than the rated voltage of the multilayer ceramic capacitor 1 (for example, 0 V) to a voltage higher than the rated voltage of the multilayer ceramic capacitor 1. Gradually increase to (V1). After that, the voltage applied to the multilayer ceramic capacitor 1 is held at V1 for a predetermined time, and then the voltage applied to the multilayer ceramic capacitor 1 is changed from a voltage (V1) higher than the rated voltage of the multilayer ceramic capacitor 1 to gradually decrease to a voltage lower than the rated voltage (for example, 0 V). Therefore, the current flowing through the multilayer ceramic capacitor 1 when there is no structural defect in the multilayer ceramic capacitor 1 is below a predetermined current value (limit current value).

If the voltage is applied as described above and there is no structural defect in the multilayer ceramic capacitor 1, the current flowing through the multilayer ceramic capacitor 1 is as shown by the solid line in the graph of FIG. That is, first, when the application of voltage to the multilayer ceramic capacitor 1 is started, the charging of the multilayer ceramic capacitor 1 is started. Therefore, the current value flowing through the multilayer ceramic capacitor 1 increases. In FIG. 3, the voltage is ramped linearly. After that, the current gradually decreases according to the DC bias characteristics of the multilayer ceramic capacitor 1 . When the applied voltage is constant, charging of the multilayer ceramic capacitor 1 progresses further and the current gradually decreases. On the other hand, when the voltage gradually decreases, discharge occurs, and current flows in opposite directions. In FIG. 3, the voltage is linearly tapered.

FIG. 4 shows a graph representing the voltage applied to the laminated ceramic capacitor in the measurement process and the current measured when a short circuit failure occurs in the laminated ceramic capacitor. For example, if a short-circuit failure occurs in the multilayer ceramic capacitor 1 during the measurement process, the current value flowing through the multilayer ceramic capacitor 1 reaches the limit current value, and until the voltage application to the multilayer ceramic capacitor 1 ends, the limit current value is reached. current flows. In the example shown in FIG. 4, a short-circuit failure occurs at time t1, so the current value changes until time t1 in the same manner as in the case shown in FIG. Until time t2, the current of the limited current value continues to flow through the multilayer ceramic capacitor 1. FIG. If a short-circuit failure occurs in the laminated ceramic capacitor 1 before the measurement process is performed, the current of the limited current value continues to flow through the laminated ceramic capacitor 1 during the entire period of the measurement process.

Therefore, in the measurement process, when the measured current value reaches the limit current value, it can be determined that the multilayer ceramic capacitor 1 to be measured has a short-circuit defect.

FIG. 5 shows a graph showing the voltage applied to the multilayer ceramic capacitor in the measurement process and the current measured when cracks occurred in the multilayer ceramic capacitor although no short-circuit failure occurred in the multilayer ceramic capacitor. In the example shown in FIG. 5, at time t3, the current value flowing through the multilayer ceramic capacitor 1 temporarily increases, unlike the case of the good product shown in FIG. That is, an abnormal current is detected. As a result of diligent research by the present inventors, it was found that cracks were generated in the multilayer ceramic capacitor 1 in which such an abnormal current was detected. Therefore, when the current flowing through the multilayer ceramic capacitor 1 does not reach the limit current value but an abnormal current as shown in FIG. 5 occurs, it is determined that the multilayer ceramic capacitor 1 to be measured has cracks. be able to. It is possible that the current flowing through the multilayer ceramic capacitor reaches the limit current value in the section where such an abnormal current occurs.

As in the present embodiment, in the measurement process, a voltage is applied to the multilayer ceramic capacitor 1 so that the current flowing through the multilayer ceramic capacitor 1 is less than a predetermined current value (for example, a limit current value) when there is no structural defect. By applying the voltage, it becomes possible to accurately detect the abnormal current as shown in FIG. Therefore, it is possible to identify a multilayer ceramic capacitor 1 in which cracks have occurred although insulation failure has not occurred. Therefore, not only structural defects that have occurred before inspection but also cracks that have newly occurred during inspection can be detected with a high degree of certainty. In addition, since other processes such as ultrasonic flaw detection are not required for crack detection, the man-hours and time required for the process of measuring the multilayer ceramic capacitor 1 can be reduced.

On the other hand, if, for example, the voltage is boosted at once in the measurement process, the current flowing through the multilayer ceramic capacitor reaches the limit current value. No peak is observed. It is preferable that the current flowing through the multilayer ceramic capacitor is below the limit current value in the entire section from the time when the voltage application starts to the time when the voltage application ends.

The reason why an abnormal current flows when a crack occurs in the multilayer ceramic capacitor 1 is not clear, but it is considered that the properties of the multilayer ceramic capacitor 1 change at the moment the crack occurs.

In the present invention, "abnormal current" refers to a current that exhibits a temporary increase during the measurement process, unlike changes in the current flowing through a non-defective multilayer ceramic capacitor. The "abnormal current" is, for example, a current peak (maximum peak for positive voltage, minimum peak for negative voltage) that is not detected when the multilayer ceramic capacitor is a non-defective product. The "abnormal current" is usually observed as a sharp peak, and the time during which the current increase is observed is about 1 to 300 μsec. This time varies from about 60 μsec, about 150 μsec, about 200 μsec, etc., depending on the capacitance of the laminated ceramic capacitor to be measured.

In the present embodiment, an example was described in which the time for holding a constant voltage was provided after the voltage applied to the multilayer ceramic capacitor 1 was gradually increased or before it was gradually decreased. The voltage may be gradually decreased immediately after the

In the present embodiment, an example has been described in which the speed of gradually increasing the voltage and the speed of gradually decreasing the voltage are constant. However, the present invention is not limited to this configuration. For example, as shown in FIGS. 7 and 8, the speed at which the voltage is gradually increased and the speed at which the voltage is gradually decreased may be varied. In the examples shown in FIGS. 7 and 8, the rate at which the voltage is ramped is decreased over time. In the example shown in FIG. 7, the speed at which the voltage is gradually decreased increases with time. In the example shown in FIG. 8, the rate at which the voltage is gradually decreased is decreased over time.

In the present embodiment, an example in which the voltage is gradually increased and then gradually decreased has been described, but as shown in FIG. 9, the voltage may be decreased at once after being gradually increased. Alternatively, the voltage may be gradually decreased after the voltage is increased at once. Preferably, the voltage is ramped up and then ramped down.

As shown in FIG. 10, the voltage may be raised to the rated voltage or less at once, then gradually increased, and then gradually decreased to the rated voltage or less, and thereafter the voltage may be decreased at once. By doing so, it is possible to shorten the time required for the low voltage region where cracks are unlikely to occur, and shorten the time required for performing the measurement process.

As shown in FIGS. 11 and 12, in the measurement process, after applying one of the positive voltage and the negative voltage to the multilayer ceramic capacitor 1, the cycle of applying the other of the positive voltage and the negative voltage may be performed at least once. good. For example, a sinusoidal voltage may be applied to the multilayer ceramic capacitor 1 . By doing so, it becomes possible to more reliably detect newly generated cracks during the inspection of the multilayer ceramic capacitor 1 .

A DC cut filter (high-pass filter) may be arranged between the current measuring section that measures the current flowing through the multilayer ceramic capacitor 1 and the abnormal current detecting section that detects the abnormal current. By doing so, it is possible to cut low-frequency current changes, which facilitates detection of abnormal currents.

Reference Signs List 1 Laminated ceramic capacitor 10 Ceramic element body 10a First main surface 10b Second main surface 10c First side surface 10d Second side surface 10e First end surface 10f Second end surface 11, 12... Internal electrodes 13, 14... External electrodes 15... Ceramic portion

Claims (4)

A measuring step of measuring a current value flowing through the laminated ceramic capacitor while applying a voltage to the laminated ceramic capacitor;
a determination step of determining that the multilayer ceramic capacitor in which an abnormal current is detected in the measurement step is abnormal;
with
In the measuring step, the voltage applied to the laminated ceramic capacitor is raised to a voltage higher than the rated voltage of the laminated ceramic capacitor, then held at the voltage, and then the rated voltage of the laminated ceramic capacitor or less. down to
In the determining step, a voltage is applied to the multilayer ceramic capacitor in which no structural defect exists before the measuring step so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value. Then, the current flowing through the multilayer ceramic capacitor is lower than the predetermined current value in the entire section from the time when the voltage application is started to the time when the voltage application is finished, and the abnormal current is 1 μsec during the voltage application. As described above, the method for inspecting a multilayer ceramic capacitor determines that a new crack has occurred if it has occurred for 300 μsec or less. In the measuring step, the voltage applied to the multilayer ceramic capacitor is set higher than the rated voltage of the multilayer ceramic capacitor so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value when no structural defect exists. 2. The method of inspecting a multilayer ceramic capacitor according to claim 1, wherein the voltage is gradually increased to a high voltage. In the measuring step, the voltage applied to the multilayer ceramic capacitor is set higher than the rated voltage of the multilayer ceramic capacitor so that the current flowing through the multilayer ceramic capacitor is less than a predetermined current value when no structural defect exists. 3. The method of inspecting a multilayer ceramic capacitor according to claim 1, wherein the voltage is gradually decreased from a high voltage to a rated voltage or less. 4. The method according to any one of claims 1 to 3 , wherein in the measuring step, a cycle of applying one of a positive voltage and a negative voltage to the multilayer ceramic capacitor and then applying the other of the positive voltage and the negative voltage is performed at least once. inspection method for multilayer ceramic capacitors.

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