JP7415322B2 - Capacitor inspection device and capacitor inspection method - Google Patents

Capacitor inspection device and capacitor inspection method Download PDF

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JP7415322B2
JP7415322B2 JP2019012208A JP2019012208A JP7415322B2 JP 7415322 B2 JP7415322 B2 JP 7415322B2 JP 2019012208 A JP2019012208 A JP 2019012208A JP 2019012208 A JP2019012208 A JP 2019012208A JP 7415322 B2 JP7415322 B2 JP 7415322B2
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capacitor
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JP2020118640A (en
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宗寛 山下
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NIDEC ADVANCE TECHNOLOGY CORPORATION
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/01Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station
    • G01R31/013Testing passive components
    • G01R31/016Testing of capacitors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • G01R19/16571Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/64Testing of capacitors

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  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
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  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Description

本発明は、キャパシタを検査するキャパシタ検査装置、及びキャパシタ検査方法に関する。 The present invention relates to a capacitor testing device and a capacitor testing method for testing a capacitor.

従来より、基本的な回路素子として、キャパシタが用いられている。図6を参照して、主要なキャパシタの一例である積層セラミックコンデンサ(Multi-Layer ceramic capacitor:MLCC)100は、互いに対向する端子電極101,102と、端子電極101から端子電極102へ向かって櫛の歯状に延びる板状の複数の内部電極103と、端子電極102から端子電極101へ向かって櫛の歯状に延び、複数の内部電極103に対して互い違いに噛み合うように対向配置される板状の内部電極104と、内部電極103と内部電極104との間に充填された誘電体105とを備えている。 Capacitors have conventionally been used as basic circuit elements. Referring to FIG. 6, a multi-layer ceramic capacitor (MLCC) 100, which is an example of a main capacitor, has terminal electrodes 101 and 102 facing each other, and a comb from terminal electrode 101 to terminal electrode 102. a plurality of plate-shaped internal electrodes 103 extending in the shape of teeth, and plates extending in the shape of comb teeth from the terminal electrode 102 toward the terminal electrode 101 and facing each other so as to mesh with the plurality of internal electrodes 103 alternately. It includes an internal electrode 104 having a shape, and a dielectric 105 filled between the internal electrode 103 and the internal electrode 104.

複数の内部電極103,104を、図7に示すように、それぞれ一枚の内部電極103,104に置き換えて説明すると、このようなキャパシタ100の静電容量Cは、内部電極103,104の面積をそれぞれS、内部電極103と内部電極104との間隔をd、誘電体105の比誘電率をεr、真空の誘電率をεoとすると、C=εo・εr・S/dで表される。 If the plural internal electrodes 103 and 104 are replaced with one internal electrode 103 and 104, respectively, as shown in FIG. 7, the capacitance C of such a capacitor 100 is calculated by S, the distance between the internal electrodes 103 and 104 is d, the dielectric constant of the dielectric 105 is εr, and the permittivity of vacuum is εo, then C=εo·εr·S/d.

近年、キャパシタの高容量化及び小型化が求められている。キャパシタ100の静電容量Cを増大させつつ、キャパシタ100を小型化するため、誘電体105の比誘電率εrの増大と、内部電極103,104の間隔dの狭小化が図られている。 In recent years, there has been a demand for higher capacitance and smaller capacitors. In order to reduce the size of the capacitor 100 while increasing the capacitance C of the capacitor 100, attempts are made to increase the relative permittivity εr of the dielectric 105 and to narrow the distance d between the internal electrodes 103 and 104.

間隔dを小さくすることは、絶縁物である電極間の誘電体105を薄くすることである。この誘電体105に異物が混入していると、誘電体105が薄くなるほど異物による内部電極103,104の短絡を生じ易くなる。異物による内部電極103,104の短絡が生じると、キャパシタ100内部で本来の電流経路とは異なる経路に電流が流れ、短絡不良となる。 Reducing the distance d means making the dielectric 105 between the electrodes, which is an insulator, thinner. If foreign matter is mixed into the dielectric 105, the thinner the dielectric 105 is, the more likely the foreign matter will cause a short circuit between the internal electrodes 103 and 104. When a short circuit occurs between the internal electrodes 103 and 104 due to a foreign object, a current flows inside the capacitor 100 in a path different from the original current path, resulting in a short circuit failure.

そこで、端子電極101,102間に一定の電圧を印加して漏れ電流を測定し、漏れ電流と印加電圧とからオームの法則により絶縁抵抗を計算することによって、キャパシタ100の短絡不良を検査する検査方法が知られている(例えば、非特許文献1参照。)。 Therefore, a test is performed to check for short circuit defects in the capacitor 100 by applying a constant voltage between the terminal electrodes 101 and 102, measuring the leakage current, and calculating the insulation resistance using Ohm's law from the leakage current and the applied voltage. A method is known (for example, see Non-Patent Document 1).

TDK株式会社ホームページ(https://product.tdk.com/info/ja/contact/faq/faq_detail_D/1432655789406.html)TDK Corporation homepage (https://product.tdk.com/info/ja/contact/faq/faq_detail_D/1432655789406.html)

ところで、キャパシタ100の不良として、印加電圧に依存して、ある特定の電圧範囲のみ漏れ電流が増大するような不良が考えられる。 By the way, a possible defect in the capacitor 100 is a defect in which the leakage current increases only in a certain voltage range depending on the applied voltage.

例えば、内部電極103,104間に電圧が印加されると、誘電体105が誘電分極する。誘電分極の程度は、印加された電圧に依存する。キャパシタ100の高容量化を目的とした比誘電率εrの増大に伴い、電圧に依存する誘電分極も増大する。また、例えば、印加電圧によって内部電極103,104に注入された電荷のために、内部電極103と内部電極104との間には引力が働き、内部電極103と内部電極103との間、及び内部電極104と内部電極104との間には斥力が働く。このように、内部電極103,104に対しては、印加電圧に応じた物理的な力も作用する。 For example, when a voltage is applied between the internal electrodes 103 and 104, the dielectric 105 undergoes dielectric polarization. The degree of dielectric polarization depends on the applied voltage. As the relative dielectric constant εr increases with the aim of increasing the capacitance of the capacitor 100, the voltage-dependent dielectric polarization also increases. Furthermore, for example, due to charges injected into the internal electrodes 103 and 104 by the applied voltage, an attractive force acts between the internal electrodes 103 and 104, and between the internal electrodes 103 and the internal electrodes 103 and the internal A repulsive force acts between the electrode 104 and the internal electrode 104. In this way, a physical force corresponding to the applied voltage also acts on the internal electrodes 103 and 104.

このように、キャパシタ100は印加電圧に依存する特性を有しているため、キャパシタ100には、印加電圧に依存して、ある特定の電圧範囲のみ生じる不良が存在すると考えられる。積層セラミックコンデンサ以外のキャパシタでも、それぞれのキャパシタの構造に起因して、印加電圧に依存する不良が存在すると考えられる。 As described above, since the capacitor 100 has characteristics that depend on the applied voltage, it is considered that the capacitor 100 has defects that occur only in a certain voltage range depending on the applied voltage. Even in capacitors other than multilayer ceramic capacitors, defects that depend on the applied voltage are thought to exist due to the structure of each capacitor.

しかしながら、非特許文献1に記載の検査方法では、一定の印加電圧を印加して検査するため、印加電圧に依存して生じる不良を検査することができなかった。 However, in the inspection method described in Non-Patent Document 1, since the inspection is performed by applying a constant applied voltage, it is not possible to inspect defects that occur depending on the applied voltage.

本発明の目的は、キャパシタの、印加電圧に依存して生じる不良を検査することができるキャパシタ検査装置、及びキャパシタ検査方法を提供することである。 An object of the present invention is to provide a capacitor testing device and a capacitor testing method capable of testing capacitors for defects that occur depending on applied voltage.

本発明の一例に係るキャパシタ検査装置は、一対の端子を備えたキャパシタを検査するためのキャパシタ検査装置であって、前記一対の端子間に対する印加電圧を、実質的に直線的に増大させる電圧印加部と、前記一対の端子間に流れる電流を検出電流として検出する電流検出部と、前記直線的に前記印加電圧が増大する期間中における前記検出電流の変化に基づいて、前記キャパシタの良否を判定する判定処理を実行する検査部とを備える。 A capacitor testing device according to an example of the present invention is a capacitor testing device for testing a capacitor provided with a pair of terminals, and the capacitor testing device is a capacitor testing device that applies a voltage that substantially linearly increases the voltage applied between the pair of terminals. a current detection unit that detects a current flowing between the pair of terminals as a detection current; and a current detection unit that determines the quality of the capacitor based on a change in the detection current during a period in which the applied voltage linearly increases. and an inspection unit that executes a determination process.

また、本発明の一例に係るキャパシタ検査方法は、一対の端子を備えたキャパシタを検査するためのキャパシタ検査方法であって、前記一対の端子間に対する印加電圧を、実質的に直線的に増大させる電圧印加工程と、前記一対の端子間に流れる電流を検出電流として検出する電流検出工程と、前記直線的に前記印加電圧が増大する期間中における前記検出電流の変化に基づいて、前記キャパシタの良否を判定する判定処理を実行する検査工程とを含む。 Further, a capacitor testing method according to an example of the present invention is a capacitor testing method for testing a capacitor having a pair of terminals, the method increasing the voltage applied between the pair of terminals substantially linearly. A voltage application process, a current detection process of detecting the current flowing between the pair of terminals as a detection current, and a change in the detection current during the period in which the applied voltage increases linearly, to determine whether the capacitor is good or not. and an inspection step of executing a determination process to determine.

このような構成のキャパシタ検査装置、及びキャパシタ検査方法は、キャパシタの、印加電圧に依存して生じる不良を検査することができる。 The capacitor testing device and capacitor testing method having such a configuration can test for defects that occur in capacitors depending on the applied voltage.

本発明の一実施形態に係るキャパシタ検査方法を実行するキャパシタ検査装置の構成の一例を示すブロック図である。1 is a block diagram showing an example of the configuration of a capacitor testing device that executes a capacitor testing method according to an embodiment of the present invention. 本発明の一実施形態に係るキャパシタ検査方法及びキャパシタ検査装置の動作の一例を説明するための説明図である。FIG. 2 is an explanatory diagram for explaining an example of the operation of a capacitor testing method and a capacitor testing device according to an embodiment of the present invention. 図1に示すキャパシタ検査装置の動作の一例を示すフローチャートである。2 is a flowchart showing an example of the operation of the capacitor testing device shown in FIG. 1. FIG. 図1に示すキャパシタ検査装置の動作の他の一例を示すフローチャートである。2 is a flowchart showing another example of the operation of the capacitor testing apparatus shown in FIG. 1. FIG. 図1に示すキャパシタ検査装置の構成の他の一例を示すブロック図である。2 is a block diagram showing another example of the configuration of the capacitor testing device shown in FIG. 1. FIG. 積層セラミックコンデンサの構造を説明するための説明図である。FIG. 2 is an explanatory diagram for explaining the structure of a multilayer ceramic capacitor. コンデンサの静電容量を説明するための説明図である。FIG. 3 is an explanatory diagram for explaining the capacitance of a capacitor.

以下、本発明に係る実施形態を図面に基づいて説明する。なお、各図において同一の符号を付した構成は、同一の構成であることを示し、その説明を省略する。図1に示すキャパシタ検査装置1は、可変電圧源2(電圧印加部)、電流検出部3、電圧検出部4、検査部5、及び接続端子T1,T2を備えている。 Hereinafter, embodiments according to the present invention will be described based on the drawings. It should be noted that structures given the same reference numerals in each figure indicate the same structure, and the explanation thereof will be omitted. The capacitor testing device 1 shown in FIG. 1 includes a variable voltage source 2 (voltage application section), a current detection section 3, a voltage detection section 4, an inspection section 5, and connection terminals T1 and T2.

キャパシタ検査装置1は、検査対象となるキャパシタ100の短絡検査を行う検査装置である。キャパシタ100は、例えば積層セラミックコンデンサである。なお、検査対象のキャパシタは、必ずしも積層セラミックコンデンサでなくてもよく、他の種類のキャパシタであってもよい。 The capacitor testing device 1 is a testing device that performs a short circuit test on a capacitor 100 to be tested. Capacitor 100 is, for example, a multilayer ceramic capacitor. Note that the capacitor to be inspected does not necessarily have to be a multilayer ceramic capacitor, but may be another type of capacitor.

キャパシタ100は、略直方体形状を有し、その両端部に一対の端子電極101,102(端子)が設けられている。 The capacitor 100 has a substantially rectangular parallelepiped shape, and a pair of terminal electrodes 101 and 102 (terminals) are provided at both ends thereof.

接続端子T1,T2は、電極又はプローブ等であり、接続端子T1を端子電極101に接触させ、接続端子T2を端子電極102に接触させることにより、キャパシタ検査装置1は、キャパシタ100を検査可能となる。可変電圧源2、電流検出部3、及び電圧検出部4は、接続端子T1,T2を介してキャパシタ100と電気的に接続される。 The connection terminals T1 and T2 are electrodes, probes, etc., and by bringing the connection terminal T1 into contact with the terminal electrode 101 and the connection terminal T2 into contact with the terminal electrode 102, the capacitor testing device 1 can test the capacitor 100. Become. Variable voltage source 2, current detection section 3, and voltage detection section 4 are electrically connected to capacitor 100 via connection terminals T1 and T2.

可変電圧源2は、検査部5からの制御信号に応じてキャパシタ100の端子電極101,102間に電圧を印加する。可変電圧源2は、いわゆる電源回路であり、検査部5からの制御信号に応じてキャパシタ100に印加する印加電圧Vを、実質的に直線的に増大させる。 Variable voltage source 2 applies a voltage between terminal electrodes 101 and 102 of capacitor 100 in response to a control signal from inspection section 5 . The variable voltage source 2 is a so-called power supply circuit, and increases the applied voltage V applied to the capacitor 100 substantially linearly in response to a control signal from the inspection section 5.

電流検出部3は、例えばシャント抵抗等を用いて構成された電流検出回路である。電流検出部3は、端子電極101,102間に流れる電流を検出電流Iとして検出し、検出電流Iを表す信号を検査部5へ出力する。 The current detection section 3 is a current detection circuit configured using, for example, a shunt resistor. The current detection section 3 detects the current flowing between the terminal electrodes 101 and 102 as a detection current I, and outputs a signal representing the detection current I to the inspection section 5.

検査部5は、例えば、いわゆるマイクロコンピュータを用いて構成されており、所定の演算処理を実行するCPU(Central Processing Unit)、データを一時的に記憶するRAM(Random Access Memory)、不揮発性のHDD(Hard Disk Drive)又はフラッシュメモリ等の記憶装置、タイマ回路、アナログデジタルコンバータ、デジタルアナログコンバータ、及びその周辺回路等を備えている。 The inspection unit 5 is configured using, for example, a so-called microcomputer, and includes a CPU (Central Processing Unit) that executes predetermined arithmetic processing, a RAM (Random Access Memory) that temporarily stores data, and a nonvolatile HDD. (Hard Disk Drive) or a storage device such as a flash memory, a timer circuit, an analog-to-digital converter, a digital-to-analog converter, and peripheral circuits thereof.

検査部5は、例えば記憶装置に記憶された所定の制御プログラムを実行することによって、判定処理を実行する。判定処理は、印加電圧Vが直線的に増大されている期間中における検出電流Iの変化に基づいて、キャパシタ100の良否を判定する。 The inspection unit 5 executes the determination process, for example, by executing a predetermined control program stored in a storage device. In the determination process, the quality of the capacitor 100 is determined based on the change in the detected current I during a period in which the applied voltage V is linearly increased.

次に、図2、図3を参照しつつ、本発明の一実施形態に係るキャパシタ検査方法及びキャパシタ検査装置1の動作について説明する。 Next, the capacitor testing method and operation of the capacitor testing apparatus 1 according to an embodiment of the present invention will be described with reference to FIGS. 2 and 3.

まず、可変電圧源2は、検査部5からの制御信号に基づいて、キャパシタ100に対する印加電圧Vを、予め設定されたΔV/Δtの傾きで実質的に直線的に増大させる(ステップS1:電圧印加工程)。以降、ステップS1~S6が実行される期間中、すなわち図2におけるタイミングt1~t2の期間t3の間、ステップS1による印加電圧Vの増大が継続される。 First, the variable voltage source 2 substantially linearly increases the voltage V applied to the capacitor 100 at a preset slope of ΔV/Δt based on a control signal from the inspection unit 5 (step S1: stamping process). Thereafter, during the period in which steps S1 to S6 are executed, that is, during the period t3 from timing t1 to t2 in FIG. 2, the increase in the applied voltage V in step S1 continues.

ΔV/Δtの傾きとは、Δt時間における印加電圧Vの変化がΔV(V)であることを意味する。ΔV/Δtは、キャパシタ100の特性又はキャパシタ検査装置1の応答性能に応じて適宜設定すればよい。 The slope of ΔV/Δt means that the change in applied voltage V over time Δt is ΔV (V). ΔV/Δt may be appropriately set according to the characteristics of the capacitor 100 or the response performance of the capacitor testing device 1.

なお、実質的に直線的、とは、可変電圧源2による電圧制御誤差等による直線からのずれを許容して直線とみなす意味である。 Note that "substantially linear" means that deviations from the straight line due to voltage control errors by the variable voltage source 2, etc. are allowed and the line is regarded as a straight line.

検査部5が、電圧増大の傾きをΔV/Δtにするように可変電圧源2を制御してもよく、検査部5から電圧供給開始の指示を受けた後、可変電圧源2が自律的に印加電圧VをΔV/Δtの傾きで直線的に増大させてもよい。 The inspection unit 5 may control the variable voltage source 2 so that the slope of the voltage increase is ΔV/Δt, and after receiving an instruction from the inspection unit 5 to start voltage supply, the variable voltage source 2 autonomously The applied voltage V may be increased linearly with a slope of ΔV/Δt.

可変電圧源2から電圧供給が開始されると、図2に示すように、キャパシタ100には電流Icが流れる。電流Icは、下記の式(1)で得られる。 When voltage supply from the variable voltage source 2 is started, a current Ic flows through the capacitor 100, as shown in FIG. The current Ic is obtained by the following equation (1).

電流Ic=C・ΔV/Δt ・・・(1)
但し、Cはキャパシタ100の静電容量。
Current Ic=C・ΔV/Δt (1)
However, C is the capacitance of the capacitor 100.

式(1)において、C、ΔV、Δtはいずれも固定値であるから、電流Icは固定値となる。すなわち、印加電圧VをΔV/Δtの傾きで直線的に増大させると、正常なキャパシタ100には一定の電流Icが流れる。 In equation (1), since C, ΔV, and Δt are all fixed values, the current Ic is a fixed value. That is, when the applied voltage V is linearly increased with a slope of ΔV/Δt, a constant current Ic flows through the normal capacitor 100.

次に、電流検出部3は、検出電流Iを検出する(ステップS2:電流検出工程)。 Next, the current detection unit 3 detects the detected current I (step S2: current detection step).

キャパシタ100が正常であれば、期間t3の間において、検出電流Iは、上述の式(1)で得られる電流Icで一定となる。しかしながら、キャパシタ100が、電圧依存性のある不良を有していた場合、図2(b)に示す波形Bのように、印加電圧Vの増大過程において一時的に検出電流Iが変化したり、図2(c)に示す波形C,Dのように、時間の経過若しくは印加電圧Vの増大に伴って、検出電流Iが徐々に増加又は減少したりすることがある。このような検出電流Iの変化を検出することによって、電圧依存性のある不良又は時間依存性のある不良を検出することができる。 If the capacitor 100 is normal, the detected current I becomes constant at the current Ic obtained by the above equation (1) during the period t3. However, if the capacitor 100 has a voltage-dependent defect, the detected current I may temporarily change during the process of increasing the applied voltage V, as shown in waveform B shown in FIG. 2(b). As shown in waveforms C and D shown in FIG. 2C, the detected current I may gradually increase or decrease as time passes or as the applied voltage V increases. By detecting such a change in the detection current I, voltage-dependent defects or time-dependent defects can be detected.

そこで、検査部5は、電流検出部3によって検出された検出電流Iが、基準範囲A内であるか否かを判定する(ステップS3:検査工程(判定処理))。基準範囲Aは、電流Icに対して、キャパシタ100の特性バラツキ、可変電圧源2による電圧制御誤差、電流検出部3による検出誤差等の許容範囲を付加したものである。基準範囲Aとしては、例えば0.9Ic~1.1Ic程度の電流範囲を用いることができる。 Therefore, the inspection unit 5 determines whether the detected current I detected by the current detection unit 3 is within the reference range A (step S3: inspection process (determination process)). The reference range A is obtained by adding tolerance ranges such as variations in the characteristics of the capacitor 100, voltage control errors by the variable voltage source 2, and detection errors by the current detector 3 to the current Ic. As the reference range A, for example, a current range of about 0.9Ic to 1.1Ic can be used.

検出電流Iが基準範囲A外であった場合(ステップS3でNO)、検査部5は、キャパシタ100は不良であると判定し(ステップS4)、処理を終了する。これにより、キャパシタ100の、電圧依存性のある不良を検出することができる。 If the detected current I is outside the reference range A (NO in step S3), the inspection unit 5 determines that the capacitor 100 is defective (step S4), and ends the process. Thereby, voltage-dependent defects in the capacitor 100 can be detected.

一方、検出電流Iが基準範囲A内であった場合(ステップS3でYES)、検査部5は、予め設定された設定電圧Veと、印加電圧Vとを比較する(ステップS5)。設定電圧Veは、印加電圧Vの増大を停止させる電圧として予め設定されている。設定電圧Veとしては、例えばキャパシタ100の定格電圧を用いることができる。 On the other hand, if the detected current I is within the reference range A (YES in step S3), the inspection unit 5 compares the preset voltage Ve and the applied voltage V (step S5). The set voltage Ve is preset as a voltage that stops the applied voltage V from increasing. As the set voltage Ve, for example, the rated voltage of the capacitor 100 can be used.

印加電圧Vが設定電圧Veに満たない場合(ステップS5でNO)、再びステップS2~S5の処理が繰り返される。一方、印加電圧Vが設定電圧Ve以上の場合(ステップS5でYES:タイミングt2)、印加電圧Vが0Vから設定電圧Veまで直線的に増大する過程で検出電流Iは基準範囲Aを超える変化をしなかったことになる。従って、検査部5は、キャパシタ100は良品と判定する(ステップS6)。 If the applied voltage V is less than the set voltage Ve (NO in step S5), the processes in steps S2 to S5 are repeated again. On the other hand, when the applied voltage V is higher than the set voltage Ve (YES in step S5: timing t2), the detected current I changes beyond the reference range A during the process in which the applied voltage V increases linearly from 0 V to the set voltage Ve. It turns out I didn't. Therefore, the inspection unit 5 determines that the capacitor 100 is a good product (step S6).

次に、検査部5は、可変電圧源2から出力される印加電圧Vを設定電圧Veで固定させ(ステップS7)、処理を終了する。 Next, the inspection unit 5 fixes the applied voltage V output from the variable voltage source 2 at the set voltage Ve (step S7), and ends the process.

以上、ステップS1~S7の処理によれば、期間t3において直線的に変化する印加電圧Vをキャパシタ100に印加することによって、キャパシタ100の電圧依存性のある不良を顕在化させることができる。その結果、波形Bのような検出電流Iの変化として電圧依存性のある不良を検出することができる。 As described above, according to the processes of steps S1 to S7, voltage-dependent defects in the capacitor 100 can be brought to light by applying the applied voltage V that changes linearly to the capacitor 100 during the period t3. As a result, a voltage-dependent defect can be detected as a change in the detected current I as shown in waveform B.

また、期間t3の間に、波形Bのように一時的な検出電流Iの変化を生じる不良、例えば、電圧印加の当初にしか異常な漏れ電流が流れないような、電圧の印加時間に依存する不良が生じる場合がある。また、波形C,Dのように、時間の経過若しくは印加電圧Vの増大に伴って、検出電流Iが徐々に増加又は減少するような、電圧印加時間又は印加電圧に依存する不良が生じる場合がある。 Additionally, defects that cause a temporary change in the detected current I as shown in waveform B during period t3, such as abnormal leakage current that flows only at the beginning of voltage application, are caused by defects that depend on the voltage application time. Defects may occur. Additionally, as shown in waveforms C and D, defects that depend on the voltage application time or applied voltage may occur, such as the detection current I gradually increasing or decreasing as time passes or the applied voltage V increases. be.

このような不良であっても、ステップS1~S7の処理によれば、期間t3の間に波形Bのように一時的に検出電流Iが変化しただけで不良と判定することができる。また、波形C、Dのように、検出電流Iが徐々に増加又は減少する場合も不良と判定することができる。従って、時間に依存する不良も検査することが容易である。 Even in the case of such a defect, according to the processing in steps S1 to S7, it can be determined that the detected current I is defective even if the detected current I changes temporarily as shown in waveform B during the period t3. Furthermore, as in waveforms C and D, when the detected current I gradually increases or decreases, it can also be determined to be defective. Therefore, it is easy to inspect even time-dependent defects.

なお、図4に示すように、検査部5は、ステップS2の後、下記の式(2)に基づいて指標Kを算出してもよい(ステップS8)。 Note that, as shown in FIG. 4, the inspection unit 5 may calculate the index K based on the following equation (2) after step S2 (step S8).

指標K=(ΔV/Δt)/I ・・・(2)
(ΔV/Δt)は固定値であるから、キャパシタ100が正常であれば指標Kは一定となり、検出電流Iが変化すれば指標Kも変化する。従って、検出電流Iの代わりに指標Kを用いてキャパシタ100を検査することが可能である。
Index K=(ΔV/Δt)/I (2)
Since (ΔV/Δt) is a fixed value, if the capacitor 100 is normal, the index K will be constant, and if the detected current I changes, the index K will also change. Therefore, it is possible to test the capacitor 100 using the index K instead of the detected current I.

そして、ステップS3の代わりに、検査部5は、指標Kが、基準範囲A’内であるか否かを判定してもよい(ステップS3a:検査工程(判定処理))。基準範囲A’は、電流Icに対応する指標Kに対して、キャパシタ100の特性バラツキ、可変電圧源2による電圧制御誤差、電流検出部3による検出誤差等の許容範囲を付加したものである。基準範囲A’としては、例えば0.9(ΔV/Δt)/Ic~1.1(ΔV/Δt)/Ic程度の範囲を用いることができる。 Then, instead of step S3, the inspection unit 5 may determine whether the index K is within the reference range A' (step S3a: inspection step (determination process)). The reference range A' is the index K corresponding to the current Ic, to which tolerance ranges such as variations in characteristics of the capacitor 100, voltage control errors by the variable voltage source 2, and detection errors by the current detector 3 are added. As the reference range A', for example, a range of about 0.9 (ΔV/Δt)/Ic to 1.1 (ΔV/Δt)/Ic can be used.

式(2)において、ΔV/Δt、Iの単位はそれぞれV/s、Aである。従って、指標Kの単位は、V/s/A=Ω/sとなる。 In formula (2), the units of ΔV/Δt and I are V/s and A, respectively. Therefore, the unit of index K is V/s/A=Ω/s.

従って、ステップS8,S3aのように、指標Kを用いてキャパシタ100の検査を行うと、キャパシタ100の特性を表す主要な物理量であるインピーダンス(Ω)に近似した単位系(Ω/s)のパラメータに基づいて、キャパシタ100の良否を判定することができる。 Therefore, when the capacitor 100 is inspected using the index K as in steps S8 and S3a, a parameter in the unit system (Ω/s) that approximates impedance (Ω), which is the main physical quantity expressing the characteristics of the capacitor 100, Based on this, it is possible to determine whether the capacitor 100 is good or bad.

なお、例えば図5に示すキャパシタ検査装置1aのように、キャパシタ100と電流検出部3との直列回路を複数、並列に接続してもよい。そして、可変電圧源2は、複数の、キャパシタ100と電流検出部3との直列回路に対して並列に、印加電圧Vを印加する構成としてもよい。 Note that, for example, a plurality of series circuits of the capacitor 100 and the current detection section 3 may be connected in parallel, as in the capacitor inspection apparatus 1a shown in FIG. 5. The variable voltage source 2 may also be configured to apply the applied voltage V in parallel to a plurality of series circuits of the capacitors 100 and the current detection section 3.

そして、検査部5aは、図3、図4におけるステップS2~S6を、各電流検出部3で検出された検出電流Iに対してそれぞれ実行することによって、複数のキャパシタ100の良否を判定する判定処理を実行してもよい。 Then, the inspection unit 5a performs steps S2 to S6 in FIG. 3 and FIG. Processing may be executed.

これにより、複数のキャパシタ100を並行して検査することが出来るので、複数のキャパシタ100の検査時間を短縮することが容易である。 Thereby, a plurality of capacitors 100 can be tested in parallel, so it is easy to shorten the test time for a plurality of capacitors 100.

もし仮に、図1に示すキャパシタ検査装置1を、複数台用いて並列検査を行う場合には、検査対象のキャパシタ100の数だけ、可変電圧源2が必要になる。一方、図5に示すキャパシタ検査装置1aによれば、単一の可変電圧源2によって、複数のキャパシタ100を並行して検査することができる。 If a parallel test is to be performed using a plurality of capacitor testing apparatuses 1 shown in FIG. 1, as many variable voltage sources 2 as there are capacitors 100 to be tested will be required. On the other hand, according to the capacitor testing apparatus 1a shown in FIG. 5, a plurality of capacitors 100 can be tested in parallel using a single variable voltage source 2.

すなわち、本発明の一例に係るキャパシタ検査装置は、一対の端子を備えたキャパシタを検査するためのキャパシタ検査装置であって、前記一対の端子間に対する印加電圧を、実質的に直線的に増大させる電圧印加部と、前記一対の端子間に流れる電流を検出電流として検出する電流検出部と、前記直線的に前記印加電圧が増大する期間中における前記検出電流の変化に基づいて、前記キャパシタの良否を判定する判定処理を実行する検査部とを備える。 That is, a capacitor testing device according to an example of the present invention is a capacitor testing device for testing a capacitor provided with a pair of terminals, and the capacitor testing device increases the voltage applied between the pair of terminals substantially linearly. a voltage application section; a current detection section that detects the current flowing between the pair of terminals as a detection current; and an inspection section that executes a determination process to determine.

また、本発明の一例に係るキャパシタ検査方法は、一対の端子を備えたキャパシタを検査するためのキャパシタ検査方法であって、前記一対の端子間に対する印加電圧を、実質的に直線的に増大させる電圧印加工程と、前記一対の端子間に流れる電流を検出電流として検出する電流検出工程と、前記直線的に前記印加電圧が増大する期間中における前記検出電流の変化に基づいて、前記キャパシタの良否を判定する判定処理を実行する検査工程とを含む。 Further, a capacitor testing method according to an example of the present invention is a capacitor testing method for testing a capacitor having a pair of terminals, the method increasing the voltage applied between the pair of terminals substantially linearly. A voltage application process, a current detection process of detecting a current flowing between the pair of terminals as a detection current, and a change in the detection current during the period in which the applied voltage increases linearly, to determine whether the capacitor is good or not. and an inspection step of executing a determination process to determine.

これらの構成によれば、キャパシタに対する印加電圧を直線的に増大させた場合、キャパシタが正常であれば流れる電流は一定になる。従って、直線的に印加電圧が増大する期間中における検出電流の変化に基づいて、キャパシタの良否を判定することができる。さらに、直線的に増大する電圧に対して流れる電流の変化、すなわち印加電圧に依存して生じる検出電流の変化がスキャンされるので、キャパシタの印加電圧に依存して生じる不良を検査することができる。 According to these configurations, when the voltage applied to the capacitor is increased linearly, the current that flows will be constant if the capacitor is normal. Therefore, the quality of the capacitor can be determined based on the change in the detected current during a period in which the applied voltage increases linearly. Furthermore, since changes in the current flowing in response to a linearly increasing voltage, that is, changes in the detected current that occur depending on the applied voltage, are scanned, defects that occur depending on the applied voltage of the capacitor can be inspected. .

また、前記検査部は、前記判定処理において、前記期間中における前記検出電流が、予め設定された基準範囲を超えて変化した場合に前記キャパシタを不良と判定することが好ましい。 Further, in the determination process, it is preferable that the inspection unit determines that the capacitor is defective when the detected current during the period changes beyond a preset reference range.

この構成によれば、直線的に印加電圧が増大する期間中、キャパシタが正常であれば流れる電流は一定になるので、期間中における検出電流が、その一定の電流値に対して予め設定された基準範囲を超えて変化した場合、キャパシタを不良と判定することができる。 According to this configuration, during a period when the applied voltage increases linearly, if the capacitor is normal, the current flowing will be constant, so the detected current during the period will be preset for that constant current value. If the change exceeds the reference range, the capacitor can be determined to be defective.

また、前記検査部は、前記印加電圧の単位時間当たりの増大値を前記検出電流で除算して得られる指標に基づいて、前記判定処理において、前記期間中における前記指標が、予め設定された基準範囲を超えて変化した場合に前記キャパシタを不良と判定することが好ましい。 In addition, in the determination process, the inspection unit determines that the index during the period is based on an index obtained by dividing the increase value per unit time of the applied voltage by the detected current. It is preferable that the capacitor is determined to be defective when the change exceeds a range.

この構成によれば、印加電圧は直線的に増大されるので、印加電圧の単位時間当たりの増大値は一定である。また、直線的に印加電圧が増大する期間中、キャパシタが正常であれば流れる電流は一定になるので、その期間中における検出電流もまたキャパシタが正常であれば一定である。従って、印加電圧の単位時間当たりの増大値を検出電流で除算して得られる指標もまた、キャパシタが正常であれば一定である。従って、期間中における指標が、その一定の指標に対して予め設定された基準範囲を超えて変化した場合、キャパシタを不良と判定することができる。 According to this configuration, since the applied voltage is increased linearly, the increase value of the applied voltage per unit time is constant. Further, during a period in which the applied voltage increases linearly, if the capacitor is normal, the current flowing is constant, so the detected current during that period is also constant if the capacitor is normal. Therefore, the index obtained by dividing the increase value of the applied voltage per unit time by the detected current is also constant if the capacitor is normal. Therefore, if the index during the period changes beyond a preset reference range for the certain index, the capacitor can be determined to be defective.

また、前記電圧印加部は、前記印加電圧を複数の前記キャパシタに対して並列に印加し、前記電流検出部を前記複数のキャパシタに対応して複数備え、前記検査部は、前記判定処理を、前記複数のキャパシタに対してそれぞれ実行することが好ましい。 Further, the voltage application section applies the applied voltage in parallel to the plurality of capacitors, and includes a plurality of the current detection sections corresponding to the plurality of capacitors, and the inspection section performs the determination process. Preferably, the process is performed for each of the plurality of capacitors.

この構成によれば、複数のキャパシタを並行して検査することができるので、複数のキャパシタの検査時間を短縮することが容易である。 According to this configuration, since a plurality of capacitors can be tested in parallel, it is easy to shorten the test time for a plurality of capacitors.

1 キャパシタ検査装置
1a キャパシタ検査装置
2 可変電圧源(電圧印加部)
3 電流検出部
4 電圧検出部
5,5a 検査部
100 キャパシタ
101,102 端子電極(端子)
103,104 内部電極
105 誘電体
A 基準範囲
B 波形
C 静電容量
d 間隔
I 検出電流
Ic 電流
K 指標
T1,T2 接続端子
t1,t2 タイミング
t3 期間
V 印加電圧
Ve 設定電圧
1 Capacitor inspection device 1a Capacitor inspection device 2 Variable voltage source (voltage application section)
3 Current detection section 4 Voltage detection section 5, 5a Inspection section 100 Capacitor 101, 102 Terminal electrode (terminal)
103, 104 Internal electrode 105 Dielectric A Reference range B Waveform C Capacitance d Interval I Detection current Ic Current K Indicators T1, T2 Connection terminals t1, t2 Timing t3 Period V Applied voltage Ve Set voltage

Claims (2)

一対の端子を備えたキャパシタを検査するためのキャパシタ検査装置であって、
前記一対の端子間に対する印加電圧を、実質的に直線的に増大させる電圧印加部と、
前記一対の端子間に流れる電流を検出電流として検出する電流検出部と、
前記直線的に前記印加電圧が増大する期間中における前記検出電流の変化に基づいて、前記キャパシタの良否を判定する判定処理を実行する検査部とを備え、
前記検査部は、前記印加電圧の単位時間当たりの増大値を前記検出電流で除算して得られる指標に基づいて、前記判定処理において、前記期間中における前記指標が、予め設定された基準範囲を超えて変化した場合に前記キャパシタを不良と判定するキャパシタ検査装置。
A capacitor inspection device for inspecting a capacitor equipped with a pair of terminals,
a voltage application unit that substantially linearly increases the voltage applied between the pair of terminals;
a current detection unit that detects the current flowing between the pair of terminals as a detection current;
an inspection unit that executes a determination process to determine whether the capacitor is good or bad based on a change in the detected current during the period in which the applied voltage linearly increases;
The inspection unit determines, in the determination process, that the index during the period falls within a preset reference range based on the index obtained by dividing the increase value per unit time of the applied voltage by the detected current. A capacitor inspection device that determines the capacitor to be defective when the capacitor changes by exceeding the specified value.
一対の端子を備えたキャパシタを検査するためのキャパシタ検査方法であって、A capacitor testing method for testing a capacitor having a pair of terminals, the method comprising:
前記一対の端子間に対する印加電圧を、実質的に直線的に増大させる電圧印加工程と、a voltage application step of substantially linearly increasing the voltage applied between the pair of terminals;
前記一対の端子間に流れる電流を検出電流として検出する電流検出工程と、a current detection step of detecting a current flowing between the pair of terminals as a detection current;
前記直線的に前記印加電圧が増大する期間中における前記検出電流の変化に基づいて、Based on the change in the detected current during the period in which the applied voltage increases linearly,
前記キャパシタの良否を判定する判定処理を実行する検査工程とを含み、an inspection step of executing a determination process to determine whether the capacitor is good or bad;
前記検査工程は、前記印加電圧の単位時間当たりの増大値を前記検出電流で除算して得られる指標に基づいて、前記判定処理において、前記期間中における前記指標が、予め設定された基準範囲を超えて変化した場合に前記キャパシタを不良と判定するキャパシタ検査方法。In the inspection step, in the determination process, the index during the period falls within a preset reference range based on an index obtained by dividing the increase value of the applied voltage per unit time by the detected current. A capacitor inspection method that determines the capacitor to be defective when the capacitor changes by exceeding the above amount.
JP2019012208A 2019-01-28 2019-01-28 Capacitor inspection device and capacitor inspection method Active JP7415322B2 (en)

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JP2019012208A JP7415322B2 (en) 2019-01-28 2019-01-28 Capacitor inspection device and capacitor inspection method
KR1020200004773A KR20200093446A (en) 2019-01-28 2020-01-14 Capacitor inspection apparatus and capacitor inspection method
CN202010041615.4A CN111487556A (en) 2019-01-28 2020-01-15 Capacitor inspection device and capacitor inspection method
TW109102071A TW202028758A (en) 2019-01-28 2020-01-21 Capacitor inspection device and capacitor inspection method that includes a variable voltage source, a current detection section, and an inspection section

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