JP7002908B2 - 表示装置 - Google Patents
表示装置 Download PDFInfo
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- JP7002908B2 JP7002908B2 JP2017199366A JP2017199366A JP7002908B2 JP 7002908 B2 JP7002908 B2 JP 7002908B2 JP 2017199366 A JP2017199366 A JP 2017199366A JP 2017199366 A JP2017199366 A JP 2017199366A JP 7002908 B2 JP7002908 B2 JP 7002908B2
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- insulating layer
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- inorganic insulating
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- H—ELECTRICITY
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- H10K50/805—Electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H—ELECTRICITY
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- H—ELECTRICITY
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- H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
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Description
図1は、本発明の一実施形態に係る表示装置100の構成を示した概略図であり、表示装置100を平面視した場合における概略構成を示している。本明細書等では、表示装置100を画面(表示領域)に垂直な方向から見た様子を「平面視」と呼ぶ。
次に、図6を参照して、表示装置100の画素109の構成について説明する。
次に、図7乃至図11を参照して、貫通孔111を囲む領域121の構成について説明する。
次に、図12を参照して、基板101端部から駆動回路104までの領域の構成について説明する。
次に、表示装置100の製造方法について、図13乃至図15Bを参照して説明する。図13は、本実施形態に係る表示装置100の製造方法を説明するためのプロセスフローである。また、図14A乃至図15Bは、表示装置100を製造するためのマスクの平面図である。なお、図13に示すプロセスフローについて、画素109の説明については図6の符号を援用し、貫通孔111及び貫通孔111を囲む領域121については図7の符号を援用して説明する。
本実施形態では、第1実施形態に示す表示装置とは一部異なる表示装置について、図16乃至図18を参照して説明する。図16は、図5に示す表示領域のB1-B2線に沿った断面図である。図17は、図5に示す表示領域のF1-F2線に沿った断面図である。また、図18は、表示装置を製造するためのマスクの平面図である。
図19は、本発明の一実施形態に係る表示装置160の構成を示した概略図であり、表示装置160を平面視した場合における概略構成を示している。なお、第1実施形態と同様の構成については、同じ符号を示し、詳細な説明は省略する。
図22に、図21に示す表示装置160のG1-G2線で切断した断面の構成を示す図である。図22は、切り欠き部161を囲む領域171の断面図である。図22には、画素109、切り欠き部を囲む領域171、及び切り欠き部161の断面図を示している。
Claims (16)
- 第1基板と、
前記第1基板上の発光素子を有する複数の画素が設けられた表示領域と、
前記第1基板上の前記表示領域の第1方向に沿って設けられた駆動回路と、
前記表示領域を覆い、前記発光素子の側から第1無機絶縁層と、有機絶縁層と、第2無機絶縁層と、が積層された封止膜と、
前記封止膜上の第2基板と、
前記第1基板、前記表示領域、及び前記第2基板に設けられた貫通孔と、
前記貫通孔を囲む第1領域と、を有し、
前記第1方向と交差する第2方向における前記貫通孔の開口部の縁から前記複数の画素のうち前記開口部に隣接する画素までの幅は、前記第2方向における前記第1基板の端部から前記駆動回路の端までの幅よりも大きく、
前記第1領域は、前記第1無機絶縁層と前記第2無機絶縁層とが接して設けられる第2領域を有し、
前記第2領域における、前記第1無機絶縁層と前記第2無機絶縁層の端部は、前記貫通孔の開口部の縁よりも前記画素に近い箇所に位置する、表示装置。 - 前記第2領域には、前記第1基板から前記第1無機絶縁層へ向かう方向に突出する凸部が配置され、
前記凸部は、前記第1無機絶縁層及び前記第2無機絶縁層に覆われている、請求項1に記載の表示装置。 - 前記凸部は、前記有機絶縁層と重ならない、請求項2に記載の表示装置。
- 前記駆動回路と、前記複数の画素と、を接続する複数の走査線と、
前記複数の走査線と交差し、前記複数の画素と接続される複数の信号線と、をさらに有し、
前記第2領域は、前記複数の走査線と重なる、請求項1に記載の表示装置。 - 前記発光素子は、第1電極と、発光層と、第2電極と、を有し、
前記第1領域において、前記画素と前記第2領域との間で、前記第2電極は、前記複数の信号線と同じ層上に設けられる第1導電層と、電気的に接続される、請求項4に記載の表示装置。 - 前記第2領域において、前記第2電極の端部は、前記第1無機絶縁層と接する、請求項5に記載の表示装置。
- 前記駆動回路と、前記複数の画素と、を接続する複数の走査線と、
前記複数の走査線と交差し、前記複数の画素と接続される複数の信号線と、をさらに有し、
前記第2領域は、前記複数の信号線と重なる、請求項1に記載の表示装置。 - 前記貫通孔の側面に、絶縁膜が設けられる、請求項1に記載の表示装置。
- 第1基板と、
前記第1基板上の発光素子を有する複数の画素が設けられた表示領域と、
前記第1基板上の前記表示領域の第1方向に沿って設けられた駆動回路と、
前記表示領域を覆い、前記発光素子の側から第1無機絶縁層と、有機絶縁層と、第2無機絶縁層と、が積層された封止膜と、
前記封止膜上の第2基板と、
前記第1基板、前記表示領域、及び前記第2基板に設けられた切り欠き部と、
前記切り欠き部を囲む第1領域と、を有し、
前記第1方向と交差する第2方向における前記切り欠き部の縁から前記複数の画素のうち前記切り欠き部に隣接する画素までの幅は、前記第2方向における前記第1基板の端部から前記駆動回路の端までの幅よりも大きく、
前記第1領域は、前記第1無機絶縁層と、前記第2無機絶縁層とが接して設けられる第2領域を有し、
前記第2領域における、前記第1無機絶縁層と前記第2無機絶縁層の端部は、前記切り欠き部の縁よりも前記画素に近い箇所に位置する、表示装置。 - 前記第2領域には、前記第1基板から前記第1無機絶縁層へ向かう方向に突出する凸部が配置され、
前記凸部は、前記第1無機絶縁層及び前記第2無機絶縁層に覆われている、請求項9に記載の表示装置。 - 前記凸部は、前記有機絶縁層と重ならない、請求項10に記載の表示装置。
- 前記駆動回路と、前記複数の画素と、を接続する複数の走査線と、
前記複数の走査線と交差し、前記複数の画素と接続される複数の信号線と、をさらに有し、
前記第2領域は、前記複数の走査線と重なる、請求項9に記載の表示装置。 - 前記発光素子は、第1電極と、発光層と、第2電極と、を有し、
前記第1領域において、前記画素と前記第2領域との間で、前記第2電極は、前記複数の信号線と同じ層上に設けられる第1導電層と、電気的に接続される、請求項12に記載の表示装置。 - 前記第2領域において、前記第2電極の端部は、前記第1無機絶縁層と接する、請求項13に記載の表示装置。
- 前記駆動回路と、前記複数の画素と、を接続する複数の走査線と、
前記複数の走査線と交差し、前記複数の画素と接続される複数の信号線と、をさらに有し、
前記第2領域は、前記複数の信号線と重なる、請求項9に記載の表示装置。 - 前記切り欠き部の側面に、絶縁膜が設けられる、請求項9に記載の表示装置。
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