JP6821607B2 - 側壁ポアの封止とビアの清浄性のための配線集積化 - Google Patents

側壁ポアの封止とビアの清浄性のための配線集積化 Download PDF

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JP6821607B2
JP6821607B2 JP2017567077A JP2017567077A JP6821607B2 JP 6821607 B2 JP6821607 B2 JP 6821607B2 JP 2017567077 A JP2017567077 A JP 2017567077A JP 2017567077 A JP2017567077 A JP 2017567077A JP 6821607 B2 JP6821607 B2 JP 6821607B2
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pore
dielectric constant
substrate
layer
low dielectric
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JP2018520518A (ja
JP2018520518A5 (enExample
Inventor
ホー レン,
ホー レン,
メフル ビー. ナイク,
メフル ビー. ナイク,
ディーネッシュ パディ,
ディーネッシュ パディ,
プリヤンカー ダッシュ,
プリヤンカー ダッシュ,
バスカー クマール,
バスカー クマール,
アレクサンドロス ティー. デモス,
アレクサンドロス ティー. デモス,
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Applied Materials Inc
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Applied Materials Inc
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    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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JP2017567077A 2015-06-25 2016-05-26 側壁ポアの封止とビアの清浄性のための配線集積化 Expired - Fee Related JP6821607B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/750,778 2015-06-25
US14/750,778 US9793108B2 (en) 2015-06-25 2015-06-25 Interconnect integration for sidewall pore seal and via cleanliness
PCT/US2016/034434 WO2016209539A1 (en) 2015-06-25 2016-05-26 Interconnect integration for sidewall pore seal and via cleanliness

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JP2018520518A JP2018520518A (ja) 2018-07-26
JP2018520518A5 JP2018520518A5 (enExample) 2019-07-04
JP6821607B2 true JP6821607B2 (ja) 2021-01-27

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US (1) US9793108B2 (enExample)
JP (1) JP6821607B2 (enExample)
KR (1) KR102565172B1 (enExample)
CN (1) CN107743651B (enExample)
TW (1) TWI700389B (enExample)
WO (1) WO2016209539A1 (enExample)

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FR3000602B1 (fr) * 2012-12-28 2016-06-24 Commissariat A L Energie Atomique Et Aux Energies Alternatives Procede de gravure d'un materiau dielectrique poreux
US12057310B2 (en) 2018-05-22 2024-08-06 Versum Materials Us, Llc Functionalized cyclosilazanes as precursors for high growth rate silicon-containing films
US11177127B2 (en) 2017-05-24 2021-11-16 Versum Materials Us, Llc Functionalized cyclosilazanes as precursors for high growth rate silicon-containing films
US11837618B1 (en) 2020-08-21 2023-12-05 Samsung Electronics Co., Ltd. Image sensor including a protective layer

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07107190B2 (ja) * 1984-03-30 1995-11-15 キヤノン株式会社 光化学気相成長方法
US6440289B1 (en) * 1999-04-02 2002-08-27 Advanced Micro Devices, Inc. Method for improving seed layer electroplating for semiconductor
US6759325B2 (en) * 2000-05-15 2004-07-06 Asm Microchemistry Oy Sealing porous structures
US6482733B2 (en) 2000-05-15 2002-11-19 Asm Microchemistry Oy Protective layers prior to alternating layer deposition
US7276441B1 (en) 2003-04-15 2007-10-02 Lsi Logic Corporation Dielectric barrier layer for increasing electromigration lifetimes in copper interconnect structures
JP2005167081A (ja) * 2003-12-04 2005-06-23 Renesas Technology Corp 半導体装置およびその製造方法
US7309658B2 (en) 2004-11-22 2007-12-18 Intermolecular, Inc. Molecular self-assembly in substrate processing
US7648927B2 (en) 2005-06-21 2010-01-19 Applied Materials, Inc. Method for forming silicon-containing materials during a photoexcitation deposition process
US20070278682A1 (en) 2006-05-31 2007-12-06 Chung-Chi Ko Self-assembled mono-layer liner for cu/porous low-k interconnections
US20080032064A1 (en) * 2006-07-10 2008-02-07 President And Fellows Of Harvard College Selective sealing of porous dielectric materials
JP5548332B2 (ja) * 2006-08-24 2014-07-16 富士通セミコンダクター株式会社 半導体デバイスの製造方法
US10037905B2 (en) * 2009-11-12 2018-07-31 Novellus Systems, Inc. UV and reducing treatment for K recovery and surface clean in semiconductor processing
JP2008263097A (ja) * 2007-04-13 2008-10-30 Toshiba Corp 半導体装置及び半導体装置の製造方法
US7781332B2 (en) * 2007-09-19 2010-08-24 International Business Machines Corporation Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer
KR101357181B1 (ko) * 2008-10-14 2014-01-29 어플라이드 머티어리얼스, 인코포레이티드 플라즈마-강화 화학적 기상 증착(pecvd)에 의해 등각성 비정질 탄소막을 증착하기 위한 방법
US8492170B2 (en) * 2011-04-25 2013-07-23 Applied Materials, Inc. UV assisted silylation for recovery and pore sealing of damaged low K films
US8216861B1 (en) * 2011-06-28 2012-07-10 Applied Materials, Inc. Dielectric recovery of plasma damaged low-k films by UV-assisted photochemical deposition
US8657961B2 (en) * 2012-04-25 2014-02-25 Applied Materials, Inc. Method for UV based silylation chamber clean
US20140162194A1 (en) * 2012-05-25 2014-06-12 Applied Materials, Inc. Conformal sacrificial film by low temperature chemical vapor deposition technique
US9058980B1 (en) * 2013-12-05 2015-06-16 Applied Materials, Inc. UV-assisted photochemical vapor deposition for damaged low K films pore sealing
US10049921B2 (en) * 2014-08-20 2018-08-14 Lam Research Corporation Method for selectively sealing ultra low-k porous dielectric layer using flowable dielectric film formed from vapor phase dielectric precursor

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CN107743651A (zh) 2018-02-27
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