JP6802146B2 - 同軸配線を備える集積デバイス - Google Patents
同軸配線を備える集積デバイス Download PDFInfo
- Publication number
- JP6802146B2 JP6802146B2 JP2017500013A JP2017500013A JP6802146B2 JP 6802146 B2 JP6802146 B2 JP 6802146B2 JP 2017500013 A JP2017500013 A JP 2017500013A JP 2017500013 A JP2017500013 A JP 2017500013A JP 6802146 B2 JP6802146 B2 JP 6802146B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- substrate
- wire
- integrated device
- electrical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H10W42/20—
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- H10W42/267—
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- H10W70/05—
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- H10W70/614—
-
- H10W70/65—
-
- H10W90/00—
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1316—Moulded encapsulation of mounted components
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- H10W70/093—
-
- H10W70/60—
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- H10W70/685—
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- H10W90/401—
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- H10W90/701—
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- H10W90/724—
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- H10W90/752—
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
- Structure Of Printed Boards (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/329,646 | 2014-07-11 | ||
| US14/329,646 US9385077B2 (en) | 2014-07-11 | 2014-07-11 | Integrated device comprising coaxial interconnect |
| PCT/US2015/039678 WO2016007706A1 (en) | 2014-07-11 | 2015-07-09 | Integrated device comprising coaxial interconnect |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017520929A JP2017520929A (ja) | 2017-07-27 |
| JP2017520929A5 JP2017520929A5 (enExample) | 2018-08-02 |
| JP6802146B2 true JP6802146B2 (ja) | 2020-12-16 |
Family
ID=53719982
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017500013A Active JP6802146B2 (ja) | 2014-07-11 | 2015-07-09 | 同軸配線を備える集積デバイス |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US9385077B2 (enExample) |
| EP (1) | EP3167483A1 (enExample) |
| JP (1) | JP6802146B2 (enExample) |
| KR (1) | KR102411667B1 (enExample) |
| CN (2) | CN115036287A (enExample) |
| AU (1) | AU2015287804B2 (enExample) |
| BR (1) | BR112017000154B1 (enExample) |
| WO (1) | WO2016007706A1 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10381303B2 (en) * | 2016-07-01 | 2019-08-13 | Vanguard International Semiconductor Corporation | Semiconductor device structures |
| TWI594338B (zh) * | 2016-08-09 | 2017-08-01 | 矽品精密工業股份有限公司 | 電子堆疊結構及其製法 |
| US10070525B2 (en) | 2016-12-28 | 2018-09-04 | Intel Corporation | Internal to internal coaxial via transition structures in package substrates |
| WO2018182652A1 (en) * | 2017-03-30 | 2018-10-04 | Intel Corporation | Semiconductor package having a coaxial first layer interconnect |
| US10734334B2 (en) * | 2018-01-29 | 2020-08-04 | Marvell Asia Pte, Ltd. | Coaxial-interconnect structure for a semiconductor component |
| KR102740257B1 (ko) * | 2019-12-17 | 2024-12-10 | 삼성전자주식회사 | 반도체 패키지 |
| KR102903835B1 (ko) * | 2020-08-25 | 2025-12-31 | 삼성전자주식회사 | 반도체 패키지 |
| KR20220059722A (ko) * | 2020-11-03 | 2022-05-10 | 삼성전자주식회사 | Bs-pdn 구조를 가진 집적회로 칩 |
| KR20220124583A (ko) * | 2021-03-03 | 2022-09-14 | 삼성전자주식회사 | 인터포저를 포함하는 전자 장치 |
| US20230036650A1 (en) * | 2021-07-27 | 2023-02-02 | Qualcomm Incorporated | Sense lines for high-speed application packages |
| CN115023038A (zh) * | 2022-04-29 | 2022-09-06 | 清华大学 | 微系统集成电路的叠装结构和叠装方法 |
| US20240047319A1 (en) * | 2022-08-04 | 2024-02-08 | Samsung Electronics Co., Ltd. | Semiconductor package and method of fabricating the same |
| US12520417B2 (en) * | 2022-12-12 | 2026-01-06 | Rolls-Royce North American Technologies Inc. | Circuit board assembly having a security shield and method of the same |
| US20250273612A1 (en) * | 2024-02-28 | 2025-08-28 | Qualcomm Incorporated | Package comprising a substrate including an inter substrate interconnect structure comprising an inner interconnect |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6623279B2 (en) | 1999-07-15 | 2003-09-23 | Incep Technologies, Inc. | Separable power delivery connector |
| JP3601462B2 (ja) * | 2001-03-05 | 2004-12-15 | オムロン株式会社 | 電子部品のパッケージ構造 |
| US6476476B1 (en) | 2001-08-16 | 2002-11-05 | Amkor Technology, Inc. | Integrated circuit package including pin and barrel interconnects |
| US7045893B1 (en) * | 2004-07-15 | 2006-05-16 | Amkor Technology, Inc. | Semiconductor package and method for manufacturing the same |
| DE102005002707B4 (de) | 2005-01-19 | 2007-07-26 | Infineon Technologies Ag | Verfahren zur Herstellung elektrischer Verbindungen in einem Halbleiterbauteil mittels koaxialer Mikroverbindungselemente |
| KR100663265B1 (ko) | 2005-05-10 | 2007-01-02 | 삼성전기주식회사 | 다층 기판 및 그 제조 방법 |
| US7884483B2 (en) | 2005-06-14 | 2011-02-08 | Cufer Asset Ltd. L.L.C. | Chip connector |
| US7307348B2 (en) * | 2005-12-07 | 2007-12-11 | Micron Technology, Inc. | Semiconductor components having through wire interconnects (TWI) |
| US7608921B2 (en) * | 2006-12-07 | 2009-10-27 | Stats Chippac, Inc. | Multi-layer semiconductor package |
| US20080158842A1 (en) * | 2006-12-29 | 2008-07-03 | Texas Instruments Incorporated | Stress and collapse resistant interconnect for mounting an integrated circuit package to a substrate |
| US7952196B1 (en) | 2008-04-21 | 2011-05-31 | Lockheed Martin Corporation | Affordable high performance high frequency multichip module fabrication and apparatus |
| KR20100075204A (ko) * | 2008-12-24 | 2010-07-02 | 삼성전자주식회사 | 스터드 범프를 이용한 적층형 반도체 패키지, 반도체 패키지 모듈, 및 그 제조방법 |
| TWI366890B (en) * | 2008-12-31 | 2012-06-21 | Ind Tech Res Inst | Method of manufacturing through-silicon-via and through-silicon-via structure |
| JP4833307B2 (ja) * | 2009-02-24 | 2011-12-07 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体モジュール、端子板、端子板の製造方法および半導体モジュールの製造方法 |
| EP2244291A1 (en) | 2009-04-20 | 2010-10-27 | Nxp B.V. | Multilevel interconnection system |
| US8288844B2 (en) * | 2009-12-17 | 2012-10-16 | Stats Chippac Ltd. | Integrated circuit packaging system with package stacking and method of manufacture thereof |
| US8736065B2 (en) * | 2010-12-22 | 2014-05-27 | Intel Corporation | Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same |
| JP2012256675A (ja) | 2011-06-08 | 2012-12-27 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置及びその製造方法 |
| JP5682496B2 (ja) * | 2011-07-28 | 2015-03-11 | 富士通セミコンダクター株式会社 | 半導体装置、マルチチップ半導体装置、デバイス、及び半導体装置の製造方法 |
| JP5775789B2 (ja) * | 2011-10-18 | 2015-09-09 | 新光電気工業株式会社 | 積層型半導体パッケージ |
| US9041208B2 (en) * | 2011-11-02 | 2015-05-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Laminate interconnect having a coaxial via structure |
-
2014
- 2014-07-11 US US14/329,646 patent/US9385077B2/en active Active
-
2015
- 2015-07-09 AU AU2015287804A patent/AU2015287804B2/en active Active
- 2015-07-09 CN CN202210862033.1A patent/CN115036287A/zh active Pending
- 2015-07-09 BR BR112017000154-3A patent/BR112017000154B1/pt not_active IP Right Cessation
- 2015-07-09 WO PCT/US2015/039678 patent/WO2016007706A1/en not_active Ceased
- 2015-07-09 CN CN201580036954.0A patent/CN106489191A/zh active Pending
- 2015-07-09 JP JP2017500013A patent/JP6802146B2/ja active Active
- 2015-07-09 EP EP15741706.4A patent/EP3167483A1/en active Pending
- 2015-07-09 KR KR1020167036601A patent/KR102411667B1/ko active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN106489191A (zh) | 2017-03-08 |
| KR102411667B1 (ko) | 2022-06-20 |
| EP3167483A1 (en) | 2017-05-17 |
| CN115036287A (zh) | 2022-09-09 |
| BR112017000154B1 (pt) | 2022-05-17 |
| AU2015287804B2 (en) | 2020-02-27 |
| US20160013125A1 (en) | 2016-01-14 |
| JP2017520929A (ja) | 2017-07-27 |
| US9385077B2 (en) | 2016-07-05 |
| AU2015287804A1 (en) | 2017-01-05 |
| KR20170028901A (ko) | 2017-03-14 |
| BR112017000154A2 (pt) | 2017-11-07 |
| WO2016007706A1 (en) | 2016-01-14 |
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