JP6774160B2 - 情報処理装置、並びに、データ転送装置の制御方法 - Google Patents

情報処理装置、並びに、データ転送装置の制御方法 Download PDF

Info

Publication number
JP6774160B2
JP6774160B2 JP2014160802A JP2014160802A JP6774160B2 JP 6774160 B2 JP6774160 B2 JP 6774160B2 JP 2014160802 A JP2014160802 A JP 2014160802A JP 2014160802 A JP2014160802 A JP 2014160802A JP 6774160 B2 JP6774160 B2 JP 6774160B2
Authority
JP
Japan
Prior art keywords
power saving
timer value
signal
module
saving mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2014160802A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015130147A5 (enExample
JP2015130147A (ja
Inventor
豪 平岡
豪 平岡
しおり 脇野
しおり 脇野
光洋 稲垣
光洋 稲垣
浩一 森下
浩一 森下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2014160802A priority Critical patent/JP6774160B2/ja
Priority to US14/553,852 priority patent/US9678562B2/en
Priority to CN201410727879.XA priority patent/CN104699642B/zh
Publication of JP2015130147A publication Critical patent/JP2015130147A/ja
Publication of JP2015130147A5 publication Critical patent/JP2015130147A5/ja
Application granted granted Critical
Publication of JP6774160B2 publication Critical patent/JP6774160B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3253Power saving in bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Debugging And Monitoring (AREA)
  • Bus Control (AREA)
JP2014160802A 2013-12-06 2014-08-06 情報処理装置、並びに、データ転送装置の制御方法 Active JP6774160B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2014160802A JP6774160B2 (ja) 2013-12-06 2014-08-06 情報処理装置、並びに、データ転送装置の制御方法
US14/553,852 US9678562B2 (en) 2013-12-06 2014-11-25 Information processing apparatus, data transfer apparatus, and control method for data transfer apparatus
CN201410727879.XA CN104699642B (zh) 2013-12-06 2014-12-04 信息处理装置、数据传送装置及数据传送装置的控制方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013253609 2013-12-06
JP2013253609 2013-12-06
JP2014160802A JP6774160B2 (ja) 2013-12-06 2014-08-06 情報処理装置、並びに、データ転送装置の制御方法

Publications (3)

Publication Number Publication Date
JP2015130147A JP2015130147A (ja) 2015-07-16
JP2015130147A5 JP2015130147A5 (enExample) 2017-09-07
JP6774160B2 true JP6774160B2 (ja) 2020-10-21

Family

ID=53271125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014160802A Active JP6774160B2 (ja) 2013-12-06 2014-08-06 情報処理装置、並びに、データ転送装置の制御方法

Country Status (3)

Country Link
US (1) US9678562B2 (enExample)
JP (1) JP6774160B2 (enExample)
CN (1) CN104699642B (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5599535B2 (ja) * 2012-03-26 2014-10-01 三菱電機株式会社 シーケンスプログラムデバッグ支援装置
KR102151178B1 (ko) * 2014-05-19 2020-09-02 삼성전자 주식회사 직렬 통신 장치 및 그 방법
JP6425492B2 (ja) * 2014-10-17 2018-11-21 キヤノン株式会社 情報処理装置、情報処理方法およびプログラム
US9690364B2 (en) * 2015-09-04 2017-06-27 Qualcomm Incorporated Systems and methods for dynamically adjusting memory state transition timers
US9781679B2 (en) * 2015-11-27 2017-10-03 Samsung Electronics Co., Ltd. Electronic systems and method of operating electronic systems
CN106126841B (zh) * 2016-06-30 2019-08-23 福州瑞芯微电子股份有限公司 一种基于硬件变频的方法和装置
JP6977439B2 (ja) * 2017-09-20 2021-12-08 ブラザー工業株式会社 電子機器
JP6991812B2 (ja) * 2017-09-26 2022-01-13 キヤノン株式会社 接続された外部装置と通信可能であって省電力状態に移行が可能なコントローラを備える情報処理装置及びその制御方法
US11144457B2 (en) * 2018-02-22 2021-10-12 Netspeed Systems, Inc. Enhanced page locality in network-on-chip (NoC) architectures
AU2018452006B2 (en) 2018-12-03 2022-12-01 Hewlett-Packard Development Company, L.P. Logic circuitry
CN110674063B (zh) * 2019-09-16 2021-03-23 上海天数智芯半导体有限公司 一种用于芯片内实现fabric的架构和方法
US12437732B2 (en) * 2020-12-28 2025-10-07 Ati Technologies Ulc Display wall synchronization using variable refresh rate modules
JP7646368B2 (ja) * 2021-01-14 2025-03-17 キヤノン株式会社 バスシステム及び撮像装置
JP2023009676A (ja) * 2021-07-07 2023-01-20 キヤノン株式会社 演算処理装置およびその制御方法
US20230400333A1 (en) * 2022-06-10 2023-12-14 Badger Meter, Inc. System and Method for Identifying the Effect of Changes in a Utility Monitoring System

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5504907A (en) * 1991-02-14 1996-04-02 Dell Usa, L.P. Power management system with adaptive control parameters for portable computer
JPH08335357A (ja) * 1995-06-08 1996-12-17 Fujitsu Ltd 記憶装置
US6711691B1 (en) * 1999-05-13 2004-03-23 Apple Computer, Inc. Power management for computer systems
US6631434B1 (en) * 1999-11-15 2003-10-07 Hewlett-Packard Development Company, L.P. Dynamic early indication system for a computer
JP4733877B2 (ja) 2001-08-15 2011-07-27 富士通セミコンダクター株式会社 半導体装置
US20030135676A1 (en) * 2002-01-17 2003-07-17 Koninklijke Philips Electronics N.V. Low-power bus interface
US7155618B2 (en) * 2002-03-08 2006-12-26 Freescale Semiconductor, Inc. Low power system and method for a data processing system
JP3654284B2 (ja) * 2002-10-03 2005-06-02 日本電気株式会社 無線端末装置及びそれを用いた無線通信システム
US7398403B2 (en) * 2004-07-01 2008-07-08 Matsushita Electric Industrial Co., Ltd. Multiprocessor control apparatus, control method thereof, and integrated circuit
JP4455540B2 (ja) 2006-06-15 2010-04-21 キヤノン株式会社 バスシステム及び調停方法
JP5023660B2 (ja) * 2006-10-31 2012-09-12 コニカミノルタビジネステクノロジーズ株式会社 画像形成装置、および画像形成装置の制御方法
JP4921283B2 (ja) * 2007-08-20 2012-04-25 株式会社日立製作所 半導体装置
JP2009122922A (ja) * 2007-11-14 2009-06-04 Panasonic Corp データ処理装置
JP2010072897A (ja) * 2008-09-18 2010-04-02 Nec Electronics Corp クロック供給装置
KR101375466B1 (ko) * 2009-01-12 2014-03-18 램버스 인코포레이티드 다중 전력 모드를 갖는 메조크로노스 시그널링 시스템
US8448001B1 (en) * 2009-03-02 2013-05-21 Marvell International Ltd. System having a first device and second device in which the main power management module is configured to selectively supply a power and clock signal to change the power state of each device independently of the other device
JP5725695B2 (ja) * 2009-03-16 2015-05-27 キヤノン株式会社 データ記憶装置、及びデータ記憶装置の制御方法
US9286257B2 (en) * 2011-01-28 2016-03-15 Qualcomm Incorporated Bus clock frequency scaling for a bus interconnect and related devices, systems, and methods
KR101842245B1 (ko) * 2011-07-25 2018-03-26 삼성전자주식회사 시스템 온 칩 버스 장치 및 그에 따른 루트 클럭 게이팅 방법
JP5775398B2 (ja) * 2011-08-25 2015-09-09 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US20130117593A1 (en) * 2011-11-07 2013-05-09 Qualcomm Incorporated Low Latency Clock Gating Scheme for Power Reduction in Bus Interconnects
JP2013106166A (ja) * 2011-11-14 2013-05-30 Sony Corp クロックゲーティング回路およびバスシステム
CN104054037B (zh) * 2011-12-16 2016-10-12 日立麦克赛尔株式会社 接收设备以及电力供给方法
JP5146590B2 (ja) * 2011-12-20 2013-02-20 コニカミノルタビジネステクノロジーズ株式会社 画像形成装置およびその制御方法
US9378132B2 (en) * 2012-03-22 2016-06-28 Hgst Technologies Santa Ana, Inc. System and method for scanning flash memories

Also Published As

Publication number Publication date
JP2015130147A (ja) 2015-07-16
CN104699642B (zh) 2018-04-24
US9678562B2 (en) 2017-06-13
US20150160716A1 (en) 2015-06-11
CN104699642A (zh) 2015-06-10

Similar Documents

Publication Publication Date Title
JP6774160B2 (ja) 情報処理装置、並びに、データ転送装置の制御方法
TWI533117B (zh) 用於電力管理之裝置、積體電路及方法
US9110671B2 (en) Idle phase exit prediction
TWI468926B (zh) 處理器電力管理及方法
EP1286248B1 (en) Semiconductor device with hardware mechanism for proper clock control
AU2015267615B2 (en) System on a chip with always-on processor
US8127153B2 (en) Memory power profiling
TWI527051B (zh) 記憶體控制器之調校、電力閘控與動態頻率改變
US20220083486A1 (en) DMA Control Circuit
TWI544323B (zh) 用於增加感測器控制器之能源效率的設備、電腦可讀媒體、方法和系統
TW201502763A (zh) 在閒置顯示情況中之記憶體電力節省
US8892922B2 (en) Voltage detection
TW201319798A (zh) 於圖形子系統中進入和退出休眠模式的系統和方法
EP3332306B1 (en) System and method for cache aware low power mode control in a portable computing device
TW201735024A (zh) 記憶體裝置及其節能控制方法
JP2013025794A (ja) フラッシュインタフェースの有効利用
KR20230160854A (ko) 메모리 제어기 전력 상태들
US10261927B2 (en) DMA controller with trigger sequence generator
JP6425492B2 (ja) 情報処理装置、情報処理方法およびプログラム
JP5304815B2 (ja) マイクロコンピュータ
US20060179172A1 (en) Method and system for reducing power consumption of a direct memory access controller
JP2014038502A (ja) 情報処理装置、情報処理方法、およびプログラム
JP6128833B2 (ja) 処理装置
JP4416575B2 (ja) メモリ制御方法及びメモリ制御装置
WO2002093392A1 (fr) Processeur de donnees

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170728

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170728

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20180725

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180803

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20181002

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20190408

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190708

C60 Trial request (containing other claim documents, opposition documents)

Free format text: JAPANESE INTERMEDIATE CODE: C60

Effective date: 20190708

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20190716

C21 Notice of transfer of a case for reconsideration by examiners before appeal proceedings

Free format text: JAPANESE INTERMEDIATE CODE: C21

Effective date: 20190719

A912 Re-examination (zenchi) completed and case transferred to appeal board

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20190927

C211 Notice of termination of reconsideration by examiners before appeal proceedings

Free format text: JAPANESE INTERMEDIATE CODE: C211

Effective date: 20191004

C22 Notice of designation (change) of administrative judge

Free format text: JAPANESE INTERMEDIATE CODE: C22

Effective date: 20200403

C22 Notice of designation (change) of administrative judge

Free format text: JAPANESE INTERMEDIATE CODE: C22

Effective date: 20200626

C23 Notice of termination of proceedings

Free format text: JAPANESE INTERMEDIATE CODE: C23

Effective date: 20200720

C03 Trial/appeal decision taken

Free format text: JAPANESE INTERMEDIATE CODE: C03

Effective date: 20200904

C30A Notification sent

Free format text: JAPANESE INTERMEDIATE CODE: C3012

Effective date: 20200904

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20201002

R151 Written notification of patent or utility model registration

Ref document number: 6774160

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151