JP6679162B2 - 半導体パッケージの製造方法 - Google Patents
半導体パッケージの製造方法 Download PDFInfo
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- JP6679162B2 JP6679162B2 JP2016028287A JP2016028287A JP6679162B2 JP 6679162 B2 JP6679162 B2 JP 6679162B2 JP 2016028287 A JP2016028287 A JP 2016028287A JP 2016028287 A JP2016028287 A JP 2016028287A JP 6679162 B2 JP6679162 B2 JP 6679162B2
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- 239000004065 semiconductor Substances 0.000 title claims description 59
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims description 64
- 230000001681 protective effect Effects 0.000 claims description 37
- 239000011347 resin Substances 0.000 claims description 27
- 229920005989 resin Polymers 0.000 claims description 27
- 238000007789 sealing Methods 0.000 claims description 17
- 238000005520 cutting process Methods 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 8
- 239000007888 film coating Substances 0.000 claims description 6
- 238000009501 film coating Methods 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 230000002411 adverse Effects 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
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Description
該基板の第2面上に形成された複数の外部接続電極と、該封止樹脂の上面及び該封止樹脂と該基板の側面に形成された電磁波をシールドする電磁波シールド膜と、該電磁波シールド膜に電気的に接続され、該基板の第2面に形成されたアース配線と、を具備する半導体パッケージの製造方法であって、格子状に形成された複数の分割予定ラインで区画された各領域に半導体素子が配設されて封止樹脂で封止され、樹脂封止された第1面と反対側の第2面に形成された複数の外部接続電極とを備えたパッケージ基板を準備するパッケージ基板準備工程と、該パッケージ基板の該外部接続電極が形成された第2面の全面に液状樹脂を塗布して保護膜を形成する保護膜被覆工程と、該パッケージ基板の該分割予定ラインに沿って、該分割予定ライン上の該保護膜を部分的に除去する一部保護膜除去工程と、該パッケージ基板を該分割予定ラインに沿って切削ブレードによって切削し、該パッケージ基板を個々の半導体パッケージに分割する分割工程と、分割された該半導体パッケージの該封止樹脂の上面及び該半導体パッケージの側面に金属膜を被覆して電磁波を遮断する電磁波シールド膜を形成する電磁波シールド膜形成工程と、該半導体パッケージの該外部接続電極が形成された第2面に被覆された該保護膜を除去する保護膜除去工程と、を備えたことを特徴とする半導体パッケージの製造方法が提供される。
13 基板
14 配線パターン
14a,14b アース用配線
16 外部接続電極(バンプ)
17a,17b,17c デバイス領域
18 封止樹脂
19 分割予定ライン
20 液状樹脂塗付装置
21 デバイス配設部
23 半導体素子
24 保護膜
25 バンプ
26 切削ブレード
27 半導体パッケージ
28 電磁波シールド膜
30 レーザー加工ヘッド(集光器)
32 レーザービーム
Claims (2)
- 第1面、第2面及び内部に配線パターンを有する基板と、
該基板の第1面上に搭載された半導体素子と、
該半導体素子を封止する封止樹脂と、
該基板の第2面上に形成された複数の外部接続電極と、
該封止樹脂の上面及び該封止樹脂と該基板の側面に形成された電磁波をシールドする電磁波シールド膜と、
該電磁波シールド膜に電気的に接続され、該基板の第2面に形成されたアース配線と、
を具備する半導体パッケージの製造方法であって、
格子状に形成された複数の分割予定ラインで区画された各領域に半導体素子が配設されて封止樹脂で封止され、樹脂封止された第1面と反対側の第2面に形成された複数の外部接続電極とを備えたパッケージ基板を準備するパッケージ基板準備工程と、
該パッケージ基板の該外部接続電極が形成された第2面の全面に液状樹脂を塗布して保護膜を形成する保護膜被覆工程と、
該パッケージ基板の該分割予定ラインに沿って、該分割予定ライン上の該保護膜を部分的に除去する一部保護膜除去工程と、
該パッケージ基板を該分割予定ラインに沿って切削ブレードによって切削し、該パッケージ基板を個々の半導体パッケージに分割する分割工程と、
分割された該半導体パッケージの該封止樹脂の上面及び該半導体パッケージの側面に金属膜を被覆して電磁波を遮断する電磁波シールド膜を形成する電磁波シールド膜形成工程と、
該半導体パッケージの該外部接続電極が形成された第2面に被覆された該保護膜を除去する保護膜除去工程と、
を備えたことを特徴とする半導体パッケージの製造方法。 - 該一部保護膜除去工程では、レーザービームの照射によって、該保護膜を該切削ブレードの厚みよりも広い幅で除去することを特徴とする請求項1記載の半導体パッケージの製造方法。
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