JP6587566B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP6587566B2
JP6587566B2 JP2016058614A JP2016058614A JP6587566B2 JP 6587566 B2 JP6587566 B2 JP 6587566B2 JP 2016058614 A JP2016058614 A JP 2016058614A JP 2016058614 A JP2016058614 A JP 2016058614A JP 6587566 B2 JP6587566 B2 JP 6587566B2
Authority
JP
Japan
Prior art keywords
counter
timer
value
time
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016058614A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017174092A5 (https=
JP2017174092A (ja
Inventor
鈴木　慎一
慎一 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2016058614A priority Critical patent/JP6587566B2/ja
Priority to US15/413,634 priority patent/US10255130B2/en
Priority to CN201710171555.6A priority patent/CN107229543B/zh
Publication of JP2017174092A publication Critical patent/JP2017174092A/ja
Publication of JP2017174092A5 publication Critical patent/JP2017174092A5/ja
Application granted granted Critical
Publication of JP6587566B2 publication Critical patent/JP6587566B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/14—Time supervision arrangements, e.g. real time clock
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079—Root cause analysis, i.e. error or fault diagnosis
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
    • G—PHYSICS
    • G04—HOROLOGY
    • G04D—APPARATUS OR TOOLS SPECIALLY DESIGNED FOR MAKING OR MAINTAINING CLOCKS OR WATCHES
    • G04D7/00—Measuring, counting, calibrating, testing or regulating apparatus
    • G04D7/002—Electrical measuring and testing apparatus
    • G04D7/003—Electrical measuring and testing apparatus for electric or electronic clocks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0697—Synchronisation in a packet node
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Computer Hardware Design (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)
JP2016058614A 2016-03-23 2016-03-23 半導体装置 Active JP6587566B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2016058614A JP6587566B2 (ja) 2016-03-23 2016-03-23 半導体装置
US15/413,634 US10255130B2 (en) 2016-03-23 2017-01-24 Semiconductor device
CN201710171555.6A CN107229543B (zh) 2016-03-23 2017-03-22 半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016058614A JP6587566B2 (ja) 2016-03-23 2016-03-23 半導体装置

Publications (3)

Publication Number Publication Date
JP2017174092A JP2017174092A (ja) 2017-09-28
JP2017174092A5 JP2017174092A5 (https=) 2018-11-22
JP6587566B2 true JP6587566B2 (ja) 2019-10-09

Family

ID=59897981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016058614A Active JP6587566B2 (ja) 2016-03-23 2016-03-23 半導体装置

Country Status (3)

Country Link
US (1) US10255130B2 (https=)
JP (1) JP6587566B2 (https=)
CN (1) CN107229543B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020195192A1 (ja) * 2019-03-26 2020-10-01 日立オートモティブシステムズ株式会社 電子制御装置、電子制御装置の診断方法
US11500708B2 (en) * 2020-04-27 2022-11-15 Renesas Electronics Corporation Semiconductor device and system using the same
JP2021179882A (ja) * 2020-05-15 2021-11-18 日立Astemo株式会社 電子制御装置
CN114328312B (zh) * 2022-03-08 2022-06-07 深圳市航顺芯片技术研发有限公司 数据处理方法、计算机设备及可读存储介质

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01227524A (ja) * 1988-03-07 1989-09-11 Fujitsu Ltd カウンタ障害検出方式
JPH10124465A (ja) * 1996-10-16 1998-05-15 Fuji Xerox Co Ltd 情報処理装置
JP3072720B2 (ja) * 1997-07-11 2000-08-07 日本電気株式会社 情報処理装置
JP4147103B2 (ja) * 2002-12-18 2008-09-10 アマノ株式会社 時刻情報取得システム
JP4313715B2 (ja) * 2004-04-01 2009-08-12 Ｏｋｉセミコンダクタ株式会社 同期確立回路および同期確立方法
US8179924B2 (en) * 2006-05-31 2012-05-15 Applied Micro Circuits Corporation Timer with network synchronized time base
FR2939587B1 (fr) * 2008-12-09 2011-04-08 Alcatel Lucent Horloge pour un noeud d'un reseau a commutation de paquets et procede de synchronisation associe.
US8229056B2 (en) * 2010-12-17 2012-07-24 Nxp B.V. Universal counter/timer circuit
JP5568048B2 (ja) * 2011-04-04 2014-08-06 株式会社日立製作所 並列計算機システム、およびプログラム
JP5722150B2 (ja) 2011-07-21 2015-05-20 ルネサスエレクトロニクス株式会社 マイクロコントローラ
JP5984508B2 (ja) * 2012-05-25 2016-09-06 ルネサスエレクトロニクス株式会社 半導体データ処理装置及びエンジン制御装置
US9746876B2 (en) * 2015-01-06 2017-08-29 Oracle International Corporation Drift compensation for a real time clock circuit

Also Published As

Publication number Publication date
US20170277584A1 (en) 2017-09-28
US10255130B2 (en) 2019-04-09
JP2017174092A (ja) 2017-09-28
CN107229543B (zh) 2022-04-22
CN107229543A (zh) 2017-10-03

Similar Documents

Publication Publication Date Title
EP3726311B1 (en) Input module for an industrial controller
US7979730B2 (en) Method and device for synchronizing cycle time of a plurality of TTCAN buses based on determined global time deviations and a corresponding bus system
US7366205B2 (en) Method for synchronizing nodes of a communications system
JP6587566B2 (ja) 半導体装置
CN111052006B (zh) 控制装置以及控制方法
JP2738106B2 (ja) 多重通信制御装置
CN105556404B (zh) 可编程控制器系统、该可编程控制器系统的控制器
CN111030909B (zh) 一种应用于can总线多主设备通讯间时间同步的方法
US10853288B2 (en) Bus system
US10924371B2 (en) Method for monitoring a first node in a communications network and monitoring system
JP6029433B2 (ja) マイコン
US9081371B2 (en) Method for synchronizing an operating clock with a time clock of an automation network
JP2023523428A (ja) パルス幅変調制御の同期化
US20090240857A1 (en) Method and device for controlling a bus system and a corresponding bus system
US12250095B2 (en) Method, system, and gateway for linking time-sensitive fieldbuses
CN108073155A (zh) 用于对集成电路的定时器进行监控的方法
US20250012674A1 (en) Synchronization of Measurement Values Delivered in an Individual Measurement Phase for a Safety Function
JP2009251854A (ja) データ処理装置及び同期方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20181015

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20181015

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20190314

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20190416

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190606

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190820

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190910

R150 Certificate of patent or registration of utility model

Ref document number: 6587566

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150