JP6543261B2 - 静電力による半導体ボンディング強化用のデバイス、システムおよび方法 - Google Patents
静電力による半導体ボンディング強化用のデバイス、システムおよび方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 36
- 239000004065 semiconductor Substances 0.000 title description 29
- 239000000758 substrate Substances 0.000 claims description 147
- 239000004020 conductor Substances 0.000 claims description 25
- 230000004888 barrier function Effects 0.000 claims description 9
- 238000007789 sealing Methods 0.000 claims 1
- 239000000463 material Substances 0.000 description 24
- 230000008569 process Effects 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 11
- 239000007789 gas Substances 0.000 description 11
- 239000002210 silicon-based material Substances 0.000 description 8
- 238000012546 transfer Methods 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000005728 strengthening Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 210000002304 esc Anatomy 0.000 description 1
- -1 etc.) Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
- H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
- H05H1/00—Generating plasma; Handling plasma
- H05H1/24—Generating plasma
- H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Electromagnetism (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
Description
Claims (9)
- 第一及び第二の基板を有する基板アセンブリをユニポーラ静電チャック(“ESC”)に配置することであって、前記ESCの電極の表面上に前記第一の基板を直接配置することと、前記第二の基板が前記第一の基板とのボンディング用の位置に至るように前記第二の基板を前記第一の基板上に配置することを含む、前記基板アセンブリを前記ESCに配置することと、
前記第二の基板が前記第一の基板とのボンディング用の位置に至ると、前記第二の基板に導体を接触して配置することと、
前記導体を前記第二の基板に接触して配置した後に、前記ESCの前記電極に電位を印加して前記第二の基板を引き付ける静電力であって、式(1)で示される前記静電力を生成し、前記第一および第二の基板の間の結合を強化することと、
を含み、
前記式(1)は、
であり、前記式(1)において、Fは前記静電力であり、kは、前記第二の基板に接触する前記第一の基板中の第一の酸化物層と前記第一の基板に接触する前記第二の基板中の第二の酸化物層とから形成される誘電性バリアの誘電率であり、dは前記誘電性バリアの誘電体の厚さであり、Vは前記誘電性バリアに渡って確立される電位である、
方法。 - 前記第一の基板は、前記電極と直接接触する第一の面と、前記第一の酸化物層が設けられた第二の面を有し、
前記第二の基板は、前記導体と接触する第一の面と、前記第二の酸化物層が設けられた第二の面を有し、
前記第一の基板及び第二の基板の間の結合は、前記第一の基板の前記第一の酸化物層と前記第二の基板の前記第二の酸化物層が結合することである、
請求項1に記載の方法。 - 前記第一の基板の前記第二の面で、または前記第二の面の近くで第二の電荷を蓄積することによって、前記第二の基板の前記第一の面で、または前記第一の面の近くで第一の電荷を蓄積することをさらに含み、前記第一の電荷および前記第二の電荷は反対である、
請求項2に記載の方法。 - 前記第二の基板を前記第一の基板に向かって、少なくとも200kNの力で押し付けることをさらに含む、
請求項1に記載の方法。 - 前記電極に印加された前記電圧を調整することによって、前記第一および第二の基板の間の前記静電力を調整することをさらに含む、
請求項1に記載の方法。 - 前記第一の基板の前記第二の面および前記第二の基板の前記第一の面にわたって、前記静電力を均一に分散することをさらに含む、
請求項2に記載の方法。 - 前記導体はコンタクトパッドを含み、前記導体を前記第二の基板に接触して配置することは、前記第二の基板と直接接触する前記コンタクトパッドを配置することを含む、
請求項1に記載の方法。 - 前記導体はプラズマガスを含み、前記導体を前記第二の基板に接触して配置することは、前記プラズマガスが前記第二の基板に接触する間に前記プラズマガスを電気的にバイアスすることを含む、
請求項1に記載の方法。 - 前記第一の基板に前記第二の基板を押し付ける間に、加圧されたチャンバ内に前記基板アセンブリを密封することをさらに含む、
請求項1に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/173,489 | 2014-02-05 | ||
US14/173,489 US10153190B2 (en) | 2014-02-05 | 2014-02-05 | Devices, systems and methods for electrostatic force enhanced semiconductor bonding |
PCT/US2015/012833 WO2015119798A1 (en) | 2014-02-05 | 2015-01-26 | Devices, systems and methods for electrostatic force enhanced semiconductor bonding |
Publications (2)
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JP2017506429A JP2017506429A (ja) | 2017-03-02 |
JP6543261B2 true JP6543261B2 (ja) | 2019-07-10 |
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JP2016549546A Active JP6543261B2 (ja) | 2014-02-05 | 2015-01-26 | 静電力による半導体ボンディング強化用のデバイス、システムおよび方法 |
Country Status (7)
Country | Link |
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US (4) | US10153190B2 (ja) |
EP (1) | EP3103134B1 (ja) |
JP (1) | JP6543261B2 (ja) |
KR (1) | KR101975643B1 (ja) |
CN (1) | CN106062938B (ja) |
TW (1) | TWI574328B (ja) |
WO (1) | WO2015119798A1 (ja) |
Families Citing this family (8)
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US10153190B2 (en) | 2014-02-05 | 2018-12-11 | Micron Technology, Inc. | Devices, systems and methods for electrostatic force enhanced semiconductor bonding |
CN107851586B (zh) | 2015-01-23 | 2021-07-06 | 维耶尔公司 | 到受体衬底的选择性微型器件转移 |
US10700120B2 (en) | 2015-01-23 | 2020-06-30 | Vuereal Inc. | Micro device integration into system substrate |
US20170215280A1 (en) | 2016-01-21 | 2017-07-27 | Vuereal Inc. | Selective transfer of micro devices |
JP7103372B2 (ja) * | 2017-11-28 | 2022-07-20 | 東京エレクトロン株式会社 | 処理装置 |
FR3074957A1 (fr) * | 2017-12-08 | 2019-06-14 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de collage par adhesion directe d'un premier substrat a un deuxieme substrat |
US10991660B2 (en) * | 2017-12-20 | 2021-04-27 | Alpha Anc Omega Semiconductor (Cayman) Ltd. | Semiconductor package having high mechanical strength |
US11380571B2 (en) * | 2018-12-13 | 2022-07-05 | Xia Tai Xin Semiconductor (Qing Dao) Ltd. | Chuck assembly and method of securing electrostatic chuck |
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- 2015-01-26 WO PCT/US2015/012833 patent/WO2015119798A1/en active Application Filing
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US20230187254A1 (en) | 2023-06-15 |
US12040211B2 (en) | 2024-07-16 |
CN106062938B (zh) | 2019-07-30 |
EP3103134B1 (en) | 2019-01-09 |
CN106062938A (zh) | 2016-10-26 |
US11114328B2 (en) | 2021-09-07 |
US10153190B2 (en) | 2018-12-11 |
US20150221540A1 (en) | 2015-08-06 |
TWI574328B (zh) | 2017-03-11 |
US11574834B2 (en) | 2023-02-07 |
WO2015119798A1 (en) | 2015-08-13 |
EP3103134A1 (en) | 2016-12-14 |
JP2017506429A (ja) | 2017-03-02 |
US20210366758A1 (en) | 2021-11-25 |
TW201543588A (zh) | 2015-11-16 |
US20190096732A1 (en) | 2019-03-28 |
KR101975643B1 (ko) | 2019-05-07 |
KR20160115983A (ko) | 2016-10-06 |
EP3103134A4 (en) | 2017-09-06 |
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