JP6451689B2 - 高周波ノイズ対策回路 - Google Patents
高周波ノイズ対策回路 Download PDFInfo
- Publication number
- JP6451689B2 JP6451689B2 JP2016093253A JP2016093253A JP6451689B2 JP 6451689 B2 JP6451689 B2 JP 6451689B2 JP 2016093253 A JP2016093253 A JP 2016093253A JP 2016093253 A JP2016093253 A JP 2016093253A JP 6451689 B2 JP6451689 B2 JP 6451689B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- frequency noise
- chip component
- noise
- ferrite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 229910000859 α-Fe Inorganic materials 0.000 claims description 45
- 230000001629 suppression Effects 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 21
- 239000000758 substrate Substances 0.000 description 15
- 239000011324 bead Substances 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 8
- 239000000696 magnetic material Substances 0.000 description 8
- 239000010410 layer Substances 0.000 description 7
- 239000004020 conductor Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 230000035699 permeability Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910003962 NiZn Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/29—Terminals; Tapping arrangements for signal inductances
- H01F27/292—Surface mounted devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0233—Filters, inductors or a magnetic substance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/008—Electric or magnetic shielding of printed inductances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/04—Fixed inductances of the signal type with magnetic core
- H01F17/06—Fixed inductances of the signal type with magnetic core with core substantially closed in itself, e.g. toroid
- H01F2017/065—Core mounted around conductor to absorb noise, e.g. EMI filter
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6611—Wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/08—Magnetic details
- H05K2201/083—Magnetic materials
- H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/1003—Non-printed inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- Geometry (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Filters And Equalizers (AREA)
- Noise Elimination (AREA)
- Coils Or Transformers For Communication (AREA)
Description
10,12 配線基板
10a,12a 実装面
11 IC(集積回路)
20 チップ部品
21 本体部
22,23 外部電極
30,31 配線パターン
40,41,42,43,44,45 ランド
Claims (5)
- 集積回路が電気的に接続された配線パターンを有する配線基板と、
前記配線基板の実装面に設けられた一対のランドと、
直方体形状の磁性体からなる本体部と前記本体部の両端部に設けられた一対の外部電極とを有するチップ部品と、
を備え、
前記一対のランドそれぞれは、前記配線パターンに接続され、
前記一対の外部電極は、前記一対のランドに接続され、
前記チップ部品は、前記実装面に対して垂直な方向から見た場合に、前記配線パターン上に、かつ、前記配線パターンと略並行に配置されることを特徴とする高周波ノイズ対策回路。 - 前記磁性体は、フェライトであることを特徴とする請求項1に記載の高周波ノイズ対策回路。
- 前記フェライトは、六方晶フェライトであることを特徴とする請求項2に記載の高周波ノイズ対策回路。
- 前記配線パターンは、前記実装面に設けられ、
前記チップ部品は、前記配線パターンの一部を覆う箇所に配置されることを特徴とする請求項1〜請求項3の何れか一項に記載の高周波ノイズ対策回路。 - 前記配線基板は、多層配線基板であり、
前記配線パターンは、前記配線基板の内部に設けられ、
前記チップ部品は、前記内部に設けられた前記配線パターン上に配置されることを特徴とする請求項1〜請求項4の何れか一項に記載の高周波ノイズ対策回路。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016093253A JP6451689B2 (ja) | 2016-05-06 | 2016-05-06 | 高周波ノイズ対策回路 |
CN201710174101.4A CN107347228B (zh) | 2016-05-06 | 2017-03-22 | 高频噪声应对电路基板 |
US15/480,421 US10103112B2 (en) | 2016-05-06 | 2017-04-06 | Circuit board with measure against high frequency noise |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016093253A JP6451689B2 (ja) | 2016-05-06 | 2016-05-06 | 高周波ノイズ対策回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017201667A JP2017201667A (ja) | 2017-11-09 |
JP6451689B2 true JP6451689B2 (ja) | 2019-01-16 |
Family
ID=60244185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016093253A Active JP6451689B2 (ja) | 2016-05-06 | 2016-05-06 | 高周波ノイズ対策回路 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10103112B2 (ja) |
JP (1) | JP6451689B2 (ja) |
CN (1) | CN107347228B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11136985B2 (en) * | 2018-08-31 | 2021-10-05 | Baker Hughes, A Ge Company, Llc | High frequency AC noise suppression within transformers |
WO2021117393A1 (ja) | 2019-12-13 | 2021-06-17 | 株式会社村田製作所 | 回路装置、およびフィルタ回路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0314023Y2 (ja) | 1984-10-09 | 1991-03-28 | ||
JPH0567896A (ja) * | 1991-09-09 | 1993-03-19 | Canon Inc | フイルタ装置 |
JPH09331185A (ja) * | 1996-06-10 | 1997-12-22 | Murata Mfg Co Ltd | ノイズ対策した電子部品 |
JPH10163027A (ja) | 1996-12-03 | 1998-06-19 | Matsushita Electric Ind Co Ltd | インダクタンス素子とこれを用いた電子回路 |
KR100562490B1 (ko) * | 2000-04-28 | 2006-03-21 | 티디케이가부시기가이샤 | 자성 페라이트 분말, 자성 페라이트 소결체, 적층형페라이트 부품 및 적층형 페라이트 부품의 제조방법 |
JP2003115691A (ja) * | 2001-10-04 | 2003-04-18 | Tdk Corp | フィルム状emiフィルタ |
JP4524454B2 (ja) * | 2004-11-19 | 2010-08-18 | ルネサスエレクトロニクス株式会社 | 電子装置およびその製造方法 |
US7145217B2 (en) * | 2005-01-25 | 2006-12-05 | Kyocera Corporation | Chip-type noise filter, manufacturing method thereof, and semiconductor package |
JP2010171290A (ja) * | 2009-01-26 | 2010-08-05 | Tdk Corp | 電子回路モジュール |
JP2010219210A (ja) * | 2009-03-16 | 2010-09-30 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
JP2013115053A (ja) * | 2011-11-24 | 2013-06-10 | Murata Mfg Co Ltd | ノイズ対策電子部品の回路基板への実装構造 |
-
2016
- 2016-05-06 JP JP2016093253A patent/JP6451689B2/ja active Active
-
2017
- 2017-03-22 CN CN201710174101.4A patent/CN107347228B/zh active Active
- 2017-04-06 US US15/480,421 patent/US10103112B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US10103112B2 (en) | 2018-10-16 |
CN107347228A (zh) | 2017-11-14 |
US20170323861A1 (en) | 2017-11-09 |
JP2017201667A (ja) | 2017-11-09 |
CN107347228B (zh) | 2020-01-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7929320B2 (en) | Inductor built-in wiring board having shield function | |
US9697946B2 (en) | Electronic component | |
WO2018159290A1 (ja) | 薄膜シールド層付き電子部品 | |
JP2017201761A (ja) | 高周波ノイズ対策回路 | |
US10879142B2 (en) | Electronic component | |
US9401242B2 (en) | Composite electronic component and composite electronic component manufacturing method | |
US9099764B2 (en) | Electronic circuit and electronic device | |
WO2010137083A1 (ja) | 配線基板、フィルタデバイスおよび携帯機器 | |
JP2017123365A (ja) | コイル部品及びこれを備える回路基板 | |
JP6451689B2 (ja) | 高周波ノイズ対策回路 | |
JP2005167468A (ja) | 電子装置および半導体装置 | |
JP2012238797A (ja) | 多層回路モジュール | |
JP2014528167A (ja) | 振動傾向を低減する回路配置 | |
JP4671333B2 (ja) | 多層プリント回路基板と電子機器 | |
JP6015813B2 (ja) | 多層回路モジュール | |
JP2010272585A (ja) | フリップチップ実装構造 | |
JP3111672U (ja) | 高周波電子部品 | |
EP1893011B1 (en) | Semiconductor circuit board and semiconductor circuit | |
JP2006279603A (ja) | 弾性表面波装置 | |
JP6395638B2 (ja) | 無線装置 | |
JP6343871B2 (ja) | 部品実装多層配線基板 | |
JP6669312B2 (ja) | モジュール部品および電源回路 | |
JP6584569B1 (ja) | プリント基板 | |
JP5736949B2 (ja) | 高周波回路モジュール | |
JP2018107221A (ja) | 多層回路基板 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20171208 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180806 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180814 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181012 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20181113 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20181126 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6451689 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |