JP6418757B2 - 配線基板及びその製造方法と半導体装置 - Google Patents

配線基板及びその製造方法と半導体装置 Download PDF

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Publication number
JP6418757B2
JP6418757B2 JP2014040092A JP2014040092A JP6418757B2 JP 6418757 B2 JP6418757 B2 JP 6418757B2 JP 2014040092 A JP2014040092 A JP 2014040092A JP 2014040092 A JP2014040092 A JP 2014040092A JP 6418757 B2 JP6418757 B2 JP 6418757B2
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JP
Japan
Prior art keywords
wiring layer
layer
multilayer wiring
multilayer
insulating layer
Prior art date
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Active
Application number
JP2014040092A
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English (en)
Japanese (ja)
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JP2015165533A (ja
JP2015165533A5 (enExample
Inventor
大井　淳
淳 大井
栗原　孝
孝 栗原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2014040092A priority Critical patent/JP6418757B2/ja
Priority to US14/633,525 priority patent/US9307641B2/en
Publication of JP2015165533A publication Critical patent/JP2015165533A/ja
Publication of JP2015165533A5 publication Critical patent/JP2015165533A5/ja
Application granted granted Critical
Publication of JP6418757B2 publication Critical patent/JP6418757B2/ja
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    • H10W70/685—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H10W70/05—
    • H10W70/611—
    • H10W70/614—
    • H10W90/00—
    • H10W90/401—
    • H10W90/701—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H10W70/60—
    • H10W72/072—
    • H10W72/07254—
    • H10W72/073—
    • H10W72/242—
    • H10W72/244—
    • H10W72/247—
    • H10W72/29—
    • H10W74/00—
    • H10W74/15—
    • H10W90/722—
    • H10W90/724—
    • H10W90/734—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2014040092A 2014-03-03 2014-03-03 配線基板及びその製造方法と半導体装置 Active JP6418757B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014040092A JP6418757B2 (ja) 2014-03-03 2014-03-03 配線基板及びその製造方法と半導体装置
US14/633,525 US9307641B2 (en) 2014-03-03 2015-02-27 Wiring substrate and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014040092A JP6418757B2 (ja) 2014-03-03 2014-03-03 配線基板及びその製造方法と半導体装置

Publications (3)

Publication Number Publication Date
JP2015165533A JP2015165533A (ja) 2015-09-17
JP2015165533A5 JP2015165533A5 (enExample) 2017-01-19
JP6418757B2 true JP6418757B2 (ja) 2018-11-07

Family

ID=54007413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014040092A Active JP6418757B2 (ja) 2014-03-03 2014-03-03 配線基板及びその製造方法と半導体装置

Country Status (2)

Country Link
US (1) US9307641B2 (enExample)
JP (1) JP6418757B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10643936B2 (en) * 2017-05-31 2020-05-05 Dyi-chung Hu Package substrate and package structure
KR20190012485A (ko) * 2017-07-27 2019-02-11 삼성전기주식회사 인쇄회로기판 및 그 제조 방법
US11032917B2 (en) 2018-06-08 2021-06-08 Unimicron Technology Corp. Circuit carrier board and manufacturing method thereof
US10888001B2 (en) 2018-06-08 2021-01-05 Unimicron Technology Corp. Circuit carrier board structure and manufacturing method thereof
US10622292B2 (en) * 2018-07-06 2020-04-14 Qualcomm Incorporated High density interconnects in an embedded trace substrate (ETS) comprising a core layer
TWI734945B (zh) * 2018-12-12 2021-08-01 欣興電子股份有限公司 複合基板結構及其製作方法
US20230073823A1 (en) * 2021-09-09 2023-03-09 Qualcomm Incorporated Package comprising a substrate with high-density interconnects

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000156564A (ja) * 1998-11-20 2000-06-06 Nec Corp プリント配線板及びその製造方法
JP4129971B2 (ja) * 2000-12-01 2008-08-06 新光電気工業株式会社 配線基板の製造方法
JP4023285B2 (ja) * 2002-10-24 2007-12-19 ソニー株式会社 光・電気配線混載ハイブリッド回路基板及びその製造方法並びに光・電気配線混載ハイブリッド回路モジュール及びその製造方法
JP2008166438A (ja) 2006-12-27 2008-07-17 Spansion Llc 半導体装置およびその製造方法
JP2008085373A (ja) 2007-12-19 2008-04-10 Ibiden Co Ltd プリント配線板およびその製造方法
JP4730426B2 (ja) * 2008-11-19 2011-07-20 ソニー株式会社 実装基板及び半導体モジュール
JP5026400B2 (ja) * 2008-12-12 2012-09-12 新光電気工業株式会社 配線基板及びその製造方法
JP5566200B2 (ja) * 2010-06-18 2014-08-06 新光電気工業株式会社 配線基板及びその製造方法
JP5855905B2 (ja) * 2010-12-16 2016-02-09 日本特殊陶業株式会社 多層配線基板及びその製造方法

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JP2015165533A (ja) 2015-09-17
US9307641B2 (en) 2016-04-05
US20150250053A1 (en) 2015-09-03

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