JP6412009B2 - ウェハレベルパッケージされた回路デバイスのための集積型接合ラインスペーサ - Google Patents
ウェハレベルパッケージされた回路デバイスのための集積型接合ラインスペーサ Download PDFInfo
- Publication number
- JP6412009B2 JP6412009B2 JP2015541791A JP2015541791A JP6412009B2 JP 6412009 B2 JP6412009 B2 JP 6412009B2 JP 2015541791 A JP2015541791 A JP 2015541791A JP 2015541791 A JP2015541791 A JP 2015541791A JP 6412009 B2 JP6412009 B2 JP 6412009B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- wafer
- metal stack
- solder metal
- stack layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00269—Bonding of solid lids or wafers to the substrate
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0035—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS
- B81B7/0041—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS maintaining a controlled atmosphere with techniques not provided for in B81B7/0038
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/007—Interconnections between the MEMS and external electrical signals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0172—Seals
- B81C2203/019—Seals characterised by the material or arrangement of seals between parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/27444—Manufacturing methods by blanket deposition of the material of the layer connector in gaseous form
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2746—Plating
- H01L2224/27462—Electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2746—Plating
- H01L2224/27464—Electroless plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29011—Shape comprising apertures or cavities
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/83139—Guiding structures on the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8314—Guiding structures outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/83141—Guiding structures both on and outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/163—Connection portion, e.g. seal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Micromachines (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/667,458 US8736045B1 (en) | 2012-11-02 | 2012-11-02 | Integrated bondline spacers for wafer level packaged circuit devices |
| US13/667,458 | 2012-11-02 | ||
| PCT/US2013/066266 WO2014070534A2 (en) | 2012-11-02 | 2013-10-23 | Integrated bondline spacers for wafer level packaged circuit devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2016504757A JP2016504757A (ja) | 2016-02-12 |
| JP6412009B2 true JP6412009B2 (ja) | 2018-10-24 |
Family
ID=50621587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015541791A Expired - Fee Related JP6412009B2 (ja) | 2012-11-02 | 2013-10-23 | ウェハレベルパッケージされた回路デバイスのための集積型接合ラインスペーサ |
Country Status (8)
| Country | Link |
|---|---|
| US (3) | US8736045B1 (enExample) |
| EP (2) | EP2915190B1 (enExample) |
| JP (1) | JP6412009B2 (enExample) |
| KR (1) | KR102164880B1 (enExample) |
| CA (1) | CA2889975C (enExample) |
| IL (2) | IL238325A0 (enExample) |
| NO (1) | NO2994775T3 (enExample) |
| WO (1) | WO2014070534A2 (enExample) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8736045B1 (en) * | 2012-11-02 | 2014-05-27 | Raytheon Company | Integrated bondline spacers for wafer level packaged circuit devices |
| US9287188B2 (en) | 2013-02-05 | 2016-03-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for a seal ring structure |
| US9673169B2 (en) | 2013-02-05 | 2017-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for a wafer seal ring |
| US9540231B2 (en) * | 2014-01-28 | 2017-01-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | MEMS device with a bonding layer embedded in the cap |
| CN104851848A (zh) * | 2014-02-17 | 2015-08-19 | 中芯国际集成电路制造(上海)有限公司 | 一种c-sam中接合晶圆的密封结构及其制备方法 |
| US9688529B2 (en) * | 2014-06-10 | 2017-06-27 | Qorvo Us, Inc. | Glass wafer assembly |
| US9334154B2 (en) | 2014-08-11 | 2016-05-10 | Raytheon Company | Hermetically sealed package having stress reducing layer |
| US9637372B2 (en) | 2015-04-27 | 2017-05-02 | Nxp Usa, Inc. | Bonded wafer structure having cavities with low pressure and method for forming |
| US9771258B2 (en) * | 2015-06-24 | 2017-09-26 | Raytheon Company | Wafer level MEMS package including dual seal ring |
| US20170081178A1 (en) * | 2015-09-22 | 2017-03-23 | Freescale Semiconductor, Inc. | Semiconductor device package with seal structure |
| US9570321B1 (en) * | 2015-10-20 | 2017-02-14 | Raytheon Company | Use of an external getter to reduce package pressure |
| DE102015224519A1 (de) * | 2015-12-08 | 2017-06-08 | Robert Bosch Gmbh | MEMS-Bauteil mit zwei unterschiedlichen Innendrücken |
| CN105731355B (zh) * | 2016-04-29 | 2017-05-31 | 合肥芯福传感器技术有限公司 | 一体化多功能陶瓷封装管壳 |
| JP6237969B1 (ja) * | 2017-03-29 | 2017-11-29 | 三菱電機株式会社 | 中空封止デバイス及びその製造方法 |
| CN107055456A (zh) * | 2017-04-14 | 2017-08-18 | 上海华虹宏力半导体制造有限公司 | 微机电系统器件的封装结构及方法 |
| CN107572474B (zh) * | 2017-08-22 | 2019-04-12 | 华中科技大学 | 一种封装间距可高精度控制的mems封装结构的封装方法 |
| CN109879240B (zh) * | 2017-12-06 | 2021-11-09 | 有研工程技术研究院有限公司 | 一种厚膜吸气材料的制备方法 |
| CN113603053B (zh) * | 2018-01-23 | 2024-01-23 | 苏州明皜传感科技股份有限公司 | 微机电系统装置 |
| US10830787B2 (en) * | 2018-02-20 | 2020-11-10 | General Electric Company | Optical accelerometers for use in navigation grade environments |
| EP4282811A4 (en) * | 2021-01-21 | 2024-11-20 | Hangzhou Hikmicro Sensing Technology Co., Ltd. | MEMS SENSOR AND ITS MANUFACTURING METHOD |
| CN113472314B (zh) * | 2021-07-22 | 2024-12-20 | 开元通信技术(厦门)有限公司 | 体声波滤波器及其制备方法 |
| DE102023210603A1 (de) * | 2023-10-26 | 2025-04-30 | Robert Bosch Gesellschaft mit beschränkter Haftung | Verfahren zum Verarbeiten eines Wafers |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5232962A (en) | 1991-10-09 | 1993-08-03 | Quantum Materials, Inc. | Adhesive bonding composition with bond line limiting spacer system |
| US6521477B1 (en) | 2000-02-02 | 2003-02-18 | Raytheon Company | Vacuum package fabrication of integrated circuit components |
| US20020179921A1 (en) * | 2001-06-02 | 2002-12-05 | Cohn Michael B. | Compliant hermetic package |
| US7952189B2 (en) * | 2004-05-27 | 2011-05-31 | Chang-Feng Wan | Hermetic packaging and method of manufacture and use therefore |
| US7576427B2 (en) | 2004-05-28 | 2009-08-18 | Stellar Micro Devices | Cold weld hermetic MEMS package and method of manufacture |
| US7442570B2 (en) * | 2005-03-18 | 2008-10-28 | Invensence Inc. | Method of fabrication of a AL/GE bonding in a wafer packaging environment and a product produced therefrom |
| US20070190747A1 (en) * | 2006-01-23 | 2007-08-16 | Tessera Technologies Hungary Kft. | Wafer level packaging to lidded chips |
| US20120132522A1 (en) | 2007-07-19 | 2012-05-31 | Innovative Micro Technology | Deposition/bonding chamber for encapsulated microdevices and method of use |
| US20090266480A1 (en) | 2008-04-29 | 2009-10-29 | International Business Machines Corporation | Process for Preparing a Solder Stand-Off |
| JP5610177B2 (ja) * | 2008-07-09 | 2014-10-22 | 国立大学法人東北大学 | 機能デバイス及びその製造方法 |
| DE102008042106A1 (de) * | 2008-09-15 | 2010-03-18 | Robert Bosch Gmbh | Verkapselung, MEMS sowie Verfahren zum Verkapseln |
| US8644125B2 (en) * | 2008-09-30 | 2014-02-04 | Intel Corporation | Seek scan probe (SSP) cantilever to mover wafer bond stop |
| JP5493767B2 (ja) * | 2009-11-25 | 2014-05-14 | 大日本印刷株式会社 | センサーユニットおよびその製造方法 |
| TWI511243B (zh) | 2009-12-31 | 2015-12-01 | 精材科技股份有限公司 | 晶片封裝體及其製造方法 |
| US8809784B2 (en) | 2010-10-21 | 2014-08-19 | Raytheon Company | Incident radiation detector packaging |
| US8454789B2 (en) * | 2010-11-05 | 2013-06-04 | Raytheon Company | Disposable bond gap control structures |
| US8507191B2 (en) * | 2011-01-07 | 2013-08-13 | Micron Technology, Inc. | Methods of forming a patterned, silicon-enriched developable antireflective material and semiconductor device structures including the same |
| US8736045B1 (en) | 2012-11-02 | 2014-05-27 | Raytheon Company | Integrated bondline spacers for wafer level packaged circuit devices |
-
2012
- 2012-11-02 US US13/667,458 patent/US8736045B1/en active Active
-
2013
- 2013-10-23 EP EP13850327.1A patent/EP2915190B1/en not_active Not-in-force
- 2013-10-23 EP EP18155856.0A patent/EP3340294A1/en not_active Withdrawn
- 2013-10-23 KR KR1020157014027A patent/KR102164880B1/ko not_active Expired - Fee Related
- 2013-10-23 JP JP2015541791A patent/JP6412009B2/ja not_active Expired - Fee Related
- 2013-10-23 CA CA2889975A patent/CA2889975C/en active Active
- 2013-10-23 WO PCT/US2013/066266 patent/WO2014070534A2/en not_active Ceased
-
2014
- 2014-03-10 US US14/202,756 patent/US9187312B2/en active Active
- 2014-05-07 NO NO14726898A patent/NO2994775T3/no unknown
- 2014-08-11 US US14/456,156 patent/US9174836B2/en active Active
-
2015
- 2015-04-16 IL IL238325A patent/IL238325A0/en active IP Right Grant
-
2018
- 2018-08-26 IL IL261373A patent/IL261373B/en active IP Right Grant
Also Published As
| Publication number | Publication date |
|---|---|
| EP3340294A1 (en) | 2018-06-27 |
| NO2994775T3 (enExample) | 2018-02-03 |
| CA2889975A1 (en) | 2014-05-08 |
| IL261373A (en) | 2018-10-31 |
| EP2915190B1 (en) | 2018-03-07 |
| JP2016504757A (ja) | 2016-02-12 |
| CA2889975C (en) | 2022-01-04 |
| EP2915190A2 (en) | 2015-09-09 |
| US20140124899A1 (en) | 2014-05-08 |
| US9187312B2 (en) | 2015-11-17 |
| US20140346643A1 (en) | 2014-11-27 |
| US9174836B2 (en) | 2015-11-03 |
| IL238325A0 (en) | 2015-06-30 |
| US20140193948A1 (en) | 2014-07-10 |
| WO2014070534A3 (en) | 2015-07-16 |
| KR102164880B1 (ko) | 2020-10-13 |
| EP2915190A4 (en) | 2016-09-14 |
| KR20150082363A (ko) | 2015-07-15 |
| US8736045B1 (en) | 2014-05-27 |
| IL261373B (en) | 2021-04-29 |
| WO2014070534A2 (en) | 2014-05-08 |
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