JP6407305B2 - 転写基板を用いて乾燥金属焼結化合物を電子部品用キャリア上へ適用する方法および対応するキャリアおよび電子部品との焼結結合のためのその使用 - Google Patents

転写基板を用いて乾燥金属焼結化合物を電子部品用キャリア上へ適用する方法および対応するキャリアおよび電子部品との焼結結合のためのその使用 Download PDF

Info

Publication number
JP6407305B2
JP6407305B2 JP2016565289A JP2016565289A JP6407305B2 JP 6407305 B2 JP6407305 B2 JP 6407305B2 JP 2016565289 A JP2016565289 A JP 2016565289A JP 2016565289 A JP2016565289 A JP 2016565289A JP 6407305 B2 JP6407305 B2 JP 6407305B2
Authority
JP
Japan
Prior art keywords
substrate
preparation
transfer substrate
electronic component
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016565289A
Other languages
English (en)
Other versions
JP2017520907A (ja
Inventor
ミヒャエル シェーファー
ミヒャエル シェーファー
スザンヌ クラウディア ドゥッフ
スザンヌ クラウディア ドゥッフ
Original Assignee
ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー
ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー, ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー filed Critical ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー
Publication of JP2017520907A publication Critical patent/JP2017520907A/ja
Application granted granted Critical
Publication of JP6407305B2 publication Critical patent/JP6407305B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736Metallic materials
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • B23K35/025Pastes, creams, slurries
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4825Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4871Bases, plates or heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743Apparatus for manufacturing layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/007Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/207Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/27003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/271Manufacture and pre-treatment of the layer connector preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/273Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2733Manufacturing methods by local deposition of the material of the layer connector in solid form
    • H01L2224/27334Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/274Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2743Manufacturing methods by blanket deposition of the material of the layer connector in solid form
    • H01L2224/27436Lamination of a preform, e.g. foil, sheet or layer
    • H01L2224/2744Lamination of a preform, e.g. foil, sheet or layer by transfer printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/29294Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29317Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29324Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • H01L2224/2949Coating material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/743Apparatus for manufacturing layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7598Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83417Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/83424Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83439Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83455Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83464Palladium [Pd] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06572Auxiliary carrier between devices, the carrier having an electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06575Auxiliary carrier between devices, the carrier having no electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1131Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Die Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

本発明は、乾燥金属焼結調製物から作製された複数の分離層断片の、電子部品用基板の所定の導電性表面部分への適用方法に関する。
エレクトロニクス産業では、半導体チップなどの電子部品の取り付けおよび電気的接触および熱放散のために金属焼結調製物を使用することが知られている。前記金属焼結調製物は、例えば、特許文献1〜4に開示されている。通常、前記金属焼結調製物は、基板を支持するために、例えばスクリーン印刷またはステンシル印刷などの印刷によって適用され、必要であれば乾燥させ、電子部品とともに構成され、焼結プロセスを受ける。液体状態へ遷移することなく、金属粒子は拡散による焼結プロセスの間結合し、基板と電子部品との間で確実な電流伝導性および熱伝導性金属結合を形成する。
分注による適用は、印刷による金属焼結調製物の適用の代替法として知られている。
国際公開第2011/026623A1号 欧州特許出願第2425920A1号 欧州特許出願第2428293A2号 欧州特許出願第2572814A1号
本発明の目的は、完全に平面でない、また適用できる場合、部分的に電子部品とともに事前構成された基板に対して、金属焼結調製物の複数の層断片の同時適用(1つの処理工程で)を可能にする方法を考案し、基板および/または場合により基板上に位置する電子部品への温度応力をできる限り低くすることである。
本発明は、乾燥金属焼結調製物から作製された複数の分離層断片の、電子部品用基板の所定の導電性表面部分への適用方法に関する。乾燥金属焼結調製物が提供された平面転写基板が本発明による方法で使用される。この方法は、
(1)金属焼結調製物から作製された複数の分離層断片を、所定の導電性表面部分に対して鏡面対称である配置において平面転写基板の一面に適用する工程と、
(2)焼結を防ぎながら、このようにして適用された金属焼結調製物を乾燥させる工程と、
(3)電子部品用基板の表面に面するように乾燥金属焼結調製物から作製された層断片を有する転写基板を配置し、接触させ、乾燥金属焼結調製物が提供された転写基板の表面部分と電子部品用基板の所定の導電性表面部分との一致した配置を確実にする工程と、
(4)工程(3)で生成された接触構成に圧縮力を適用する工程と、
(5)接触構成から転写基板を除去する工程と、
を含み、工程(4)の完了後に、電子部品用基板の所定の導電性表面部分に対する乾燥金属焼結調製物の接着力は、転写基板の表面に対する接着力より大きく、
平面転写基板は非焼結性であり、適用できる場合、被覆金属箔または熱可塑性フィルムであり、
電子部品用基板は10〜500μmの1つ以上のくぼみを含む平面状表面を有する基板であり、さらにリードフレーム、セラミック基板、DCB基板、および金属複合材からなる群から選択され、少なくとも1つの所定の導電性表面部分はくぼみの中に位置する。
また本発明は、本発明による方法にしたがって製造され、乾燥金属焼結調製物が提供された電子部品用基板に関する。
電子部品の例としては、能動部品(例:LED、ダイオード、IGBT、サイリスタ、MOSFET、トランジスタなどの半導体チップ)および/または受動部品(例:レジスタ、コンデンサ、インダクタ、およびメモリスタ)および/または圧電セラミック、および/またはペルチェ素子を含む。
「乾燥金属焼結調製物」とは、揮発性成分を完全に、または基本的に含まない、もはや湿性でない、未焼結の金属焼結調製物を意味することが理解されるものとする。例えば「乾燥金属焼結調製物」とは、金属焼結調製物中に最初に存在する98〜100重量%の揮発性成分が除去されたことを意味し、乾燥金属焼結調製物は、工程(2)で適用される乾燥条件を繰り返し適用した後でさえ、重量計測式測定で質量が一定または基本的に一定であることが分かった。乾燥金属焼結調製物は、70℃未満の温度で形が安定する、固化した、依然として焼結性の金属焼結調製物である。本発明による方法の工程(1)で使用される金属焼結調製物は下記でより詳細に説明する。
本発明による方法で乾燥金属焼結調製物が適用される電子部品用基板は、エレクトロニクス産業で一般的な支持基板であり、リードフレーム、セラミック基板、DCB基板、および金属複合材からなる群から選択され、電子部品用基板は、キャビティと呼ばれる10〜500μmの1つ以上のくぼみを含むような平面状表面を有する基板である。基板は平坦な基板であってもよい。電子部品用基板は電子部品に電圧/電流を提供するための導電性表面部分を含む。この文脈では、「導電性表面部分」とは、基板の電気絶縁性表面の、および/または電気絶縁性表面上の導電性表面部分のレイアウトのことを言う。すなわち、それは例えば、印刷導体のパターンのことを言う。それに対して、「所定の導電性表面部分」とは、乾燥金属焼結調製物が適用される、および/または乾燥金属焼結調製物を用いて電子部品が取り付けられ、電気接触される導電性表面部分のそれらの部分のことを言う。この文脈では、少なくとも1つの所定の導電性表面部分は、10〜500μmのくぼみの中に位置する。これを言い換えると、複数の状況が実施可能である。
基板は10〜500μmの1つのくぼみを有し、1つの所定の導電性表面部分は前記くぼみの中に位置し、1つ以上のさらなる所定の導電性表面部分はくぼみの外側に位置する。
基板は10〜500μmの1つのくぼみを有し、複数の所定の導電性表面部分は前記くぼみの中に位置し、1つ以上のさらなる所定の導電性表面部分はくぼみの外側に位置する。
基板は10〜500μmの1つのくぼみを有し、全ての所定の導電性表面部分は前記くぼみの中に位置する。
基板は10〜500μmの複数のくぼみを有し、所定の導電性表面部分の1つはくぼみの1つの中に位置し、1つ以上のさらなる所定の導電性表面部分はくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、複数の所定の導電性表面部分はくぼみの1つの中に位置し、1つ以上のさらなる所定の導電性表面部分はくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、全ての所定の導電性表面部分はくぼみの1つの中に位置する。
基板は10〜500μmの複数のくぼみを有し、所定の導電性表面部分が1つずつそれぞれのくぼみの中に位置し、さらなる所定の導電性表面部分は、くぼみの外側に全く位置しないか、または1つ以上のさらなる所定の導電性表面部分がくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、所定の導電性表面部分が1つずつくぼみのいくつかの中に位置し、さらなる所定の導電性表面部分は、くぼみの外側に全く位置しないか、または1つ以上のさらなる所定の導電性表面部分がくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、所定の導電性表面部分が複数ずつくぼみのそれぞれの中に位置し、さらなる所定の導電性表面部分は、くぼみの外側に全く位置しないか、または1つ以上のさらなる所定の導電性表面部分がくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、所定の導電性表面部分が複数ずつくぼみのいくつかの中に位置し、さらなる所定の導電性表面部分は、くぼみの外側に全く位置しないか、または1つ以上のさらなる所定の導電性表面部分がくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、いくつかのくぼみの中には1つ、いくつかのくぼみの中には複数の、所定の導電性表面部分がくぼみの2つ以上の中に位置し、さらなる所定の導電性表面部分は、くぼみの外側に全く位置しないか、または1つ以上のさらなる所定の導電性表面部分がくぼみの外側に位置する。
基板は10〜500μmの複数のくぼみを有し、いくつかのくぼみの中には1つ、いくつかのくぼみの中には複数の、所定の導電性表面部分がくぼみの中に位置し、所定の導電性表面部分を含まないくぼみはなく、さらなる所定の導電性表面部分は、くぼみの外側に全く位置しないか、または1つ以上のさらなる所定の導電性表面部分がくぼみの外側に位置する。
さらに電子部品用基板は、本発明による方法で乾燥金属焼結調製物から作製された層断片が提供される前に、1つ以上の電子部品とともに構成されていてもよい。部品の高さによって、深さまたは全深さは例えば10〜200μmであり、または相対的に高い部品の高さを有する部品の場合、例えばそのような隣接する部品間は200〜1000μmである。全深さは、例えば、10〜500μmの前記くぼみのうちの1つの深さと部品の高さおよび/または前記くぼみに隣接または隣に位置する電子部品のうち最も高い部品の高さとの合計であり得る。
電子部品用基板の導電性表面部分は特に金属製である。後者の場合は、これは電気的接触用に一般的な薄い金属層またはメタライゼーションに関し、例えば、銅、銀、金、パラジウム、ニッケル、アルミニウム、およびこれらの金属の適切な合金から作製される。これは他の金属層でコーティングされた金属、例えば金の層でコーティングされたニッケル、外部が金とパラジウムの層でコーティングされたニッケル、金の層でコーティングされた銀/パラジウム合金を考慮してもよい。
本発明による方法の工程(1)では、複数の分離層断片の形態の金属焼結調製物は、電子部品用基板の所定の導電性表面部分に対して鏡面対称の配置、すなわち電子部品用基板の所定の導電性表面部分に対応するが鏡面対称の配置において平面転写基板の一面に適用される。実際的見地から見れば、この文脈では、分離層断片は一度にまたは同時に適用される。「分離層断片」とは、これは連続層ではなく、互いから分離していて金属焼結調製物から適用される個別の層状の要素に関することを意味することが理解されるものとする。上記の説明から明らかなように、所定の導電性表面部分は互いから分離した個別の表面部分でもある。
この金属焼結調製物は、電子部品の取り付けおよび電気的接触および熱放散のためにエレクトロニクス産業で使用される基本的に公知の金属焼結調製物である。1つ以上の金属または金属合金および/または焼結プロセスの間に金属を形成する金属化合物から作製された粒子の他に、金属焼結調製物は、特に、可能な添加物に加えて揮発性有機溶媒も含む。金属粒子は、例えば銅、ニッケル、アルミニウム、または特に銀から作製された金属粒子であり、それぞれは例えば1〜10μmの範囲の平均粒径(レーザー回析によって測定されたd50)を有する。添加物の例としては、金属粒子用のコーティング、例えばC8−C28脂肪酸、C8−C28脂肪酸塩、C8−C28脂肪酸エステル、一般的な焼結助剤、およびポリマー結合剤などを含む。特許文献1〜4は、使用することができる金属焼結調製物、特に金属焼結ペーストを開示している文献の例である。
平面転写基板は非焼結性であり、適用できる場合、被覆金属箔または熱可塑性フィルムであり、例えば、ポリエステル、フルオロポリマー、例えばポリテトラフルオロエチレン、ポリイミド、シリコーンまたはポリオレフィンなどから作製されている。金属焼結調製物が提供される可塑性フィルムの全質量または面は、例えば接着低減材が提供、例えばコーティングされていてもよい。接着低減材の例としては、シリコーンまたはフルオロポリマーをベースにした物質を含む。平面転写基板は、透明な可塑性フィルムであることが好ましい。
工程(4)の完了後に、乾燥金属焼結調製物の接着力は、電子部品用基板の所定の導電性表面部分に対しての方が、転写基板の表面に対してより大きいことは必須である。例えば、220g/cmの接着力の接着テープを用いたDIN EN 14099(2002年10月)にしたがって測定された接着力が0.4N/cm以上大きい場合、十分である。
一実施形態では、転写基板は、熱応力にさらされた後でさえ、大部分が寸法的に安定している軟質熱可塑性フィルムである。この軟質熱可塑性フィルムは、120℃の対象温度で30分間熱応力にさらされた後、その長さと幅の寸法の変化は1.5%以下を示すことが好ましく(ASTM D 1204)、すなわち前記条件にさらされた後、長さと幅の寸法の変化は全くないか、または最大1.5%未満であることが好ましい(ASTM D 1204)。
本発明による方法において転写基板として用いることができる熱可塑性フィルムの例としては、市販の可塑性フィルム、三菱製のHostaphan(登録商標)RN75、DuPont製のMylar(登録商標)A 50μmおよび/または75μm、および東レ製のLumirror(登録商標)40.01を含む。
金属焼結調製物は通常、例えばスクリーン印刷またはステンシル印刷などの印刷によって、例えば最高200μmの乾燥層の厚さで転写基板に適用される。十分に非粘性の金属焼結調製物の場合、適用は噴霧によって行うこともでき、金属焼結調製物にさらされるべきでない領域を保護する手段として適切であり得る。前記手段の例としては、テープを適用すること、またはステンシルで覆うことを含む。
本発明による方法の工程(2)では、工程(1)で適用される湿性金属焼結調製物は、焼結を防ぎながら乾燥させる。すなわち、例えば有機溶媒などの揮発性成分が除去される。好ましくは、金属焼結調製物の乾燥プロセスは、特に、乾燥プロセスの後、金属焼結調製物中で完了へ進む焼結プロセスが起こることなく、金属焼結調製物から揮発性成分を除去するのに適切な温度条件の条件で行われる。この目的で、金属焼結調製物が提供された転写基板は、例えば対流式オーブンなどのオーブンで、例えば10〜30分間、80〜150℃で加熱することができる。この文脈では、オーブンを不活性にしてもよく、適用できる場合、例えば窒素雰囲気を用いて不活性にしてもよい。
上述のように、乾燥金属焼結調製物は、溶媒などの揮発性成分が少なくとも基本的に除去され、例えば後の焼結プロセスで金属粒子および/または金属を形成する金属化合物に加えて非揮発性添加物を依然として含む。乾燥金属焼結調製物は固化するが、焼結しないか、または部分的にのみ焼結する。すなわち固化した金属焼結調製物は依然として焼結することができる。
したがって、転写基板上にある乾燥金属焼結調製物とともに転写基板はプリフォームを形成し、中間生成物として工程(3)〜(5)を含むさらなる製造プロセスに導くことができる。工程(3)〜(5)を含むさらなる製造プロセスは、工程(1)および(2)を実施する製造者の施設で、または他の製造者の施設で行うことができる。概して、中間生成物は、さらなる処理のために搬送できるほど安定していて扱いやすいものである。これは乾燥金属焼結調製物が固化して寸法的に安定したことによる。
本発明による方法の工程(3)は、乾燥金属焼結調製物から作製された層断片を有する転写基板を電子部品用基板の表面の方へ配向し、配置し、接触させ、乾燥金属焼結調製物が提供された転写基板の表面部分と電子部品用基板の所定の導電性表面部分との一致した配置を確実にする。これは転写基板上の乾燥金属焼結調製物が位置する場所が、乾燥金属焼結調製物が適用される、および/または乾燥金属焼結調製物を用いて電子部品が取り付けられ、後で電気的に接触させられる電子部品用基板の前記所定の導電性表面部分によって覆われることを確実にする。工程(3)の配置はどの位置で行われてもよく、例えば垂直または水平位置で行われてもよい。例えば水平位置では、転写基板は電子部品用基板の下、またはその逆に配置されてもよい。
実際の転写工程である本発明による方法の工程(4)では、工程(3)で生成された接触構成上に、乾燥金属焼結調製物が位置する全表面またはそれらの位置で少なくとも十分に圧縮力が加えられる。例えば、0.5〜10MPaの接触圧力は、例えば1〜30秒間、適用されてもよい。この文脈では、最高150℃の対象温度の上昇を使用することが適切であり得、加熱は例えば加圧ツールの下側および/または上側を加熱することによって行うことができる。一般的な装置は、例えば積層プレス工程、特に加熱可能な積層プレス工程などの処理工程(4)を実施するのに使用することができる。さらに、例えば50〜70のショアA硬度の適合した硬さの程度の例えばシリコーンプレートが、パンチと乾燥金属焼結調製物が提供された転写基板との間に使用することができる。具体的には、圧縮力が全表面に適用されない場合、乾燥金属焼結調製物が位置する位置のパンチを妨げるように作動する補助器具を使用することができる。特に基板が電子部品とともに、特に相対的に高く組み立てられた高さの電子部品とともにすでに構成されているとき、記載した手順は適切である。さらに、転写基板は、電子部品用基板の表面に完全に接触できるように、すでに存在する前記電子部品用の適切な凹部を含むことが適切であり得る。
工程(4)の完了後に、転写基板は本発明による方法の工程(5)で除去され、乾燥金属焼結調製物は電子部品用基板の所定の導電性表面部分上にとどまる。最初に転写基板に接着し、その後、転写によって除去される乾燥金属焼結調製物の表面は、今度はさらなる製造プロセスの対象となる電子部品に取り付け、および/または結合することが意図される。
工程(3)〜(5)は、例えばローラー積層プロセスに合うようにバッチプロセスまたは連続して行うことができる。実際的見地から見ると、一度にまたは同時に工程(3)〜(5)の順序で、分離層断片は転写基板から電子部品用基板に転写される。
一実施形態では、本発明による方法は、電子部品用基板の両面に乾燥金属焼結調製物が提供されるように適切に行うことができる。この文脈では基本的に同じ工程(1)〜(5)が行われるが、ただし工程(3)〜(4)では電子部品用基板が乾燥金属焼結調製物が適切に提供された2つの転写基板の間に配置され、工程(5)で転写基板が電子部品用基板の両面から除去される。
(2)からさらなる製造プロセスにおける電子部品の取り付けおよび結合のために行われる工程は、例えば別の製造者の施設で行うこともできる。前記さらなる製造プロセスは実際の焼結工程を含む。この文脈では、まず、一般的なサンドイッチ配置が、本発明の方法によってそれに転写される乾燥金属焼結調製物を有する電子部品用基板と電子部品とから生成される。次にサンドイッチ配置は焼結プロセスを受け、その間に焼結された金属焼結調製物が乾燥金属焼結調製物から生成され、基板と電子部品との間に機械的、電気的、および熱伝導性結合が形成される。
乾燥金属焼結調製物が提供された電子部品用基板の形態の工程(1)〜(5)を含む本発明による方法の生成物は、中間生成物として、前節で説明されたさらなる製造プロセスへ回すことのできるプリフォームである。
概して、中間生成物はさらなる処理のために搬送できるほど安定していて扱いやすいものである。これは転写された乾燥金属焼結調製物が固化して寸法的に安定したことによる。
本発明による方法は、金属焼結調製物の乾燥プロセスの間に広がる温度応力に基板または電子部品をさらすことなく、層断片状の乾燥金属焼結調製物を一度に電子部品用基板に適用できるようにする。この文脈では、本発明による方法は、従来のスクリーン印刷またはステンシル印刷では実施不可能であった、基板の表面上のくぼみの中で、また適用できる場合、基板上にすでに存在する電子部品間で、乾燥金属焼結調製物の適用を可能にする。
本発明を以下の一つの例示的な実施形態を通して説明するが、いかなる方法または形態においても本発明を限定するようには解釈されない。
例示的な実施形態(電子部品用基板として厚さ500μmの銀箔(GoodFellow製、Typ AG000465)中の150μmの深さのキャビティ内の2つのダイオード(IFX IDC73D120T6H)を焼結)
ヘレウス(ドイツ、ハナウ)製の焼結ペーストASP 043−04を、Koenen製の75μmの厚さのスチールステンシルを用いたDEK Horizon 03iXステンシルプリンタを用いて、転写基板としての三菱製のPETフィルム、タイプHostaphan(登録商標)RN7525JK上に印刷した(印刷速度20mm/秒、ドクターブレード圧力2kg)。印刷された焼結ペーストのレイアウトは、銀ペースト中のキャビティのレイアウトに鏡面対称になるように配置した。
印刷された転写フィルムを100℃で15分間、対流式オーブン(Binder)で乾燥させた。
焼結ペーストを銀箔のキャビティに転写するために、印刷されて乾燥焼結ペーストが提供された転写フィルムを、印刷面側で焼結ペーストとキャビティの一致した配置において銀箔上にセットした。
圧力の分配のために、シリコーンフィルム(Alpha Tectrade、タイプ「Silikon 60 rot Basic」)を、印刷を有さない転写フィルムの面の上方に配置した。
積層プレス(Laufer)(銀箔側で100℃の温度で5MPaの接触圧力で10秒間、転写フィルム側は加熱しない)で、焼結ペーストを銀箔中のキャビティに転写した。転写完了後、転写フィルムを除去し、銀箔を乾燥焼結ペーストが提供されたキャビティ内のダイオードとともに構成し、加圧焼結プロセスを行った。

Claims (12)

  1. 乾燥金属焼結調製物から作製された複数の分離層断片の、電子部品用基板の複数の所定の導電性表面部分への適用方法であって、
    (1)金属焼結調製物から作製された複数の分離層断片を、前記複数の所定の導電性表面部分に対して鏡面対称である配置において平面転写基板の一面に適用する工程と、
    (2)焼結を防ぎながら、このようにして適用された前記金属焼結調製物を乾燥させる工程と、
    (3)前記電子部品用基板の表面に面するように乾燥金属焼結調製物から作製された前記複数の分離層断片を有する前記平面転写基板を配置し、前記乾燥金属焼結調製物の表面部分と前記電子部品用基板の複数の所定の導電性表面部分とを接触させる工程と、
    (4)工程(3)で生成された接触構成に圧縮力を適用する工程と、
    (5)前記接触構成から前記平面転写基板を除去する工程と、
    を含み、
    工程(4)の完了後に、前記電子部品用基板の複数の所定の導電性表面部分に対する前記乾燥金属焼結調製物の接着力が前記平面転写基板の表面に対する接着力より大きく、
    前記平面転写基板が非焼結性であり
    記電子部品用基板は10μm以上500μm以下の1つ以上のくぼみを含む平面状表面を有する基板であり、さらにリードフレーム、セラミック基板、DCB基板、および金属複合材からなる群から選択され、少なくとも1つの所定の導電性表面部分はくぼみの中に位置する、適用方法。
  2. 前記平面転写基板が、120℃の対象温度で30分間熱応力にさらされた後、前記平面転写基板の長さと幅の寸法の変化が、ASTM D 1204に準拠した方法によって測定された値で、1.5%以下を示す軟質熱可塑性フィルムである、請求項1に記載の方法。
  3. 前記工程(3)の前に、前記電子部品用基板が1つ以上の電子部品とともに構成されている、請求項1または2に記載の方法。
  4. 前記平面転写基板が、前記電子部品用基板上に既に存在する電子部品用の凹部を含む、請求項3に記載の方法。
  5. 前記平面転写基板は、透明な熱可塑性フィルムである、請求項1〜4のいずれか一項に記載の方法。
  6. 前記金属焼結調製物が工程(1)で印刷または噴霧によって適用される請求項1〜5のいずれか一項に記載の方法。
  7. 工程(2)での乾燥プロセスが80℃以上150℃以下の対象温度に加熱することにより10分以上30分以下行われる、請求項1〜6のいずれか一項に記載の方法。
  8. 0.5MPa以上10MPa以下の接触圧力が工程(4)で1秒以上30秒以下適用される、請求項1〜7のいずれか一項に記載の方法。
  9. 最高150℃の対象温度の上昇が工程(4)で使用される、請求項1〜8のいずれか一項に記載の方法。
  10. 前記工程(1)では、前記複数の分離層断片を一度に適用する請求項1〜9のいずれか一項に記載の方法。
  11. 前記複数の分離層断片は、前記工程(3)〜(5)の順序で、前記平面転写基板から前記電子部品用基板に一度に転写される請求項1〜10のいずれか一項に記載の方法。
  12. 請求項1〜11のいずれか一項に記載の方法によって乾燥金属焼結調製物が提供された電子部品用基板の製造方法。
JP2016565289A 2014-05-05 2014-09-03 転写基板を用いて乾燥金属焼結化合物を電子部品用キャリア上へ適用する方法および対応するキャリアおよび電子部品との焼結結合のためのその使用 Active JP6407305B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP14167010.9 2014-05-05
EP14167010 2014-05-05
PCT/EP2014/068739 WO2015169401A1 (de) 2014-05-05 2014-09-03 Verfahren zum aufbringen getrockneter metallsinterzubereitung mittels eines transfersubstrats auf einen träger für elektronikbauteile, entsprechender träger und seine verwendung zum sinterverbinden mit elektronikbauteilen

Publications (2)

Publication Number Publication Date
JP2017520907A JP2017520907A (ja) 2017-07-27
JP6407305B2 true JP6407305B2 (ja) 2018-10-17

Family

ID=50693471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016565289A Active JP6407305B2 (ja) 2014-05-05 2014-09-03 転写基板を用いて乾燥金属焼結化合物を電子部品用キャリア上へ適用する方法および対応するキャリアおよび電子部品との焼結結合のためのその使用

Country Status (9)

Country Link
US (1) US20170194169A1 (ja)
EP (1) EP3140854A1 (ja)
JP (1) JP6407305B2 (ja)
KR (1) KR20160136351A (ja)
CN (1) CN106463413B (ja)
MX (1) MX2016012036A (ja)
SG (1) SG11201608656PA (ja)
TW (1) TW201601858A (ja)
WO (1) WO2015169401A1 (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190130148A (ko) * 2017-05-12 2019-11-21 헤레우스 도이칠란트 게엠베하 운트 코. 카게 금속 페이스트에 의해 부품들을 연결하기 위한 방법
CN107845627B (zh) * 2017-09-29 2020-02-18 深圳奥比中光科技有限公司 多接近度检测光传感器
US11373976B2 (en) * 2019-08-02 2022-06-28 Rockwell Collins, Inc. System and method for extreme performance die attach
JP7023302B2 (ja) * 2020-02-04 2022-02-21 田中貴金属工業株式会社 導電性接合材料を備える接合部材及び接合方法
JP7536528B2 (ja) 2020-06-29 2024-08-20 日東電工株式会社 積層体
TW202335556A (zh) * 2022-01-20 2023-09-01 美商阿爾發金屬化工公司 使用層壓模組化預製件接合電組件及機械組件之方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6029882A (en) * 1998-04-27 2000-02-29 International Business Machines Corporation Plastic solder array using injection molded solder
US7059512B2 (en) * 2002-11-06 2006-06-13 Ricoh Company, Ltd. Solder alloy material layer composition, electroconductive and adhesive composition, flux material layer composition, solder ball transferring sheet, bump and bump forming process, and semiconductor device
JP2004172612A (ja) * 2002-11-06 2004-06-17 Ricoh Co Ltd 微小径バンプを有する半導体素子、インクジェット方式によるバンプ形成およびそれに用いるインク組成物
US7005325B2 (en) * 2004-02-05 2006-02-28 St Assembly Test Services Ltd. Semiconductor package with passive device integration
US7847375B2 (en) * 2008-08-05 2010-12-07 Infineon Technologies Ag Electronic device and method of manufacturing same
DE102009040076A1 (de) 2009-09-04 2011-03-10 W.C. Heraeus Gmbh Metallpaste mit Oxidationsmittel
DE102010044329A1 (de) * 2010-09-03 2012-03-08 Heraeus Materials Technology Gmbh & Co. Kg Kontaktierungsmittel und Verfahren zur Kontaktierung elektrischer Bauteile
DE102010044326A1 (de) 2010-09-03 2012-03-08 Heraeus Materials Technology Gmbh & Co. Kg Verwendung von aliphatischen Kohlenwasserstoffen und Paraffinen als Lösemittel in Silbersinterpasten
KR102114489B1 (ko) * 2010-11-03 2020-05-22 알파 어셈블리 솔루션스 인크. 소결 재료 및 이를 이용한 부착 방법
DE102011005322B4 (de) * 2011-03-10 2017-04-06 Semikron Elektronik Gmbh & Co. Kg Verfahren zur Herstellung eines Leistungshalbleitersubstrates
EP2572814B1 (de) 2011-09-20 2016-03-30 Heraeus Deutschland GmbH & Co. KG Paste und Verfahren zum Verbinden von elektronischem Bauelement mit Substrat
US8598694B2 (en) * 2011-11-22 2013-12-03 Infineon Technologies Ag Chip-package having a cavity and a manufacturing method thereof
KR101456826B1 (ko) * 2012-07-03 2014-10-31 도레이 카부시키가이샤 개편화된 접착제층을 갖는 접착제 시트의 제조 방법, 접착제 시트를 사용한 배선 기판의 제조 방법, 반도체 장치의 제조 방법 및 접착제 시트의 제조 장치

Also Published As

Publication number Publication date
KR20160136351A (ko) 2016-11-29
US20170194169A1 (en) 2017-07-06
TW201601858A (zh) 2016-01-16
SG11201608656PA (en) 2016-12-29
JP2017520907A (ja) 2017-07-27
MX2016012036A (es) 2017-01-19
WO2015169401A1 (de) 2015-11-12
EP3140854A1 (de) 2017-03-15
CN106463413A (zh) 2017-02-22
CN106463413B (zh) 2019-10-25

Similar Documents

Publication Publication Date Title
JP6407305B2 (ja) 転写基板を用いて乾燥金属焼結化合物を電子部品用キャリア上へ適用する方法および対応するキャリアおよび電子部品との焼結結合のためのその使用
US10821704B2 (en) Substrate for electrical circuits and method for producing a substrate of this type
US8835299B2 (en) Pre-sintered semiconductor die structure
JP5852795B2 (ja) 低温加圧焼結接合を含む2個の接合素子の構成体の製造方法
CN105189409B (zh) 金属-陶瓷板层压体的制造装置及制造方法、功率模块用基板的制造装置及制造方法
KR20170137095A (ko) 접합체, 히트 싱크가 부착된 파워 모듈용 기판, 히트 싱크, 및 접합체의 제조 방법, 히트 싱크가 부착된 파워 모듈용 기판의 제조 방법, 히트 싱크의 제조 방법
US9640511B2 (en) Method for producing a circuit carrier arrangement having a carrier which has a surface formed by an aluminum/silicon carbide metal matrix composite material
US11257735B2 (en) Heat sink-equipped power module substrate and manufacturing method for heat sink-equipped power module substrate
US9230889B2 (en) Chip arrangement with low temperature co-fired ceramic and a method for forming a chip arrangement with low temperature co-fired ceramic
JP4978221B2 (ja) 回路基板の製造装置及び製造方法、その製造方法に用いられるクッションシート
US20150123263A1 (en) Two-step method for joining a semiconductor to a substrate with connecting material based on silver
JP2008283184A (ja) 焼結されたパワー半導体基板並びにそのための製造方法
KR20170126878A (ko) 접합체의 제조 방법, 히트 싱크가 부착된 파워 모듈용 기판의 제조 방법, 및 히트 싱크의 제조 방법
KR102496716B1 (ko) 세라믹 기판 제조 방법
EP3771301A1 (en) Insulated circuit board and method for producing insulated circuit board
JP5535375B2 (ja) 接続シート
CN107667419B (zh) 用于制造电路载体的方法
WO2018012006A1 (ja) 回路基板の製造方法及び回路基板
JP5296846B2 (ja) 接続シート
JP2015153900A (ja) 積層体およびその製造方法
CN110546747A (zh) 借助金属浆料来连接器件的方法
EP3395783B1 (en) Method for producing a sintered joint between a ceramic substrate and a carrier
JP6790915B2 (ja) 絶縁回路基板の製造方法
JP6853443B2 (ja) パワーモジュール用基板の製造方法
TWI753854B (zh) 接合體之製造方法、附散熱片之電力模組用基板之製造方法、及散熱片之製造方法

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20171107

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20171205

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180305

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180904

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180918

R150 Certificate of patent or registration of utility model

Ref document number: 6407305

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250