JP6360175B2 - 複数のコアのゲート長を変動させるシステムおよび方法 - Google Patents

複数のコアのゲート長を変動させるシステムおよび方法 Download PDF

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JP6360175B2
JP6360175B2 JP2016540885A JP2016540885A JP6360175B2 JP 6360175 B2 JP6360175 B2 JP 6360175B2 JP 2016540885 A JP2016540885 A JP 2016540885A JP 2016540885 A JP2016540885 A JP 2016540885A JP 6360175 B2 JP6360175 B2 JP 6360175B2
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core
length
transistor
gate
semiconductor die
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JP2016534574A5 (https=
JP2016534574A (ja
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ミン・チャイ
サミット・セングプタ
チョック・ヒン・ガン
プル・チダムバラム
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クアルコム，インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H10D84/0142—Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/83138—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having different shapes or dimensions of their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/8314—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having gate insulating layers with different properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/207—Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Physics & Mathematics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2016540885A 2013-09-04 2014-07-30 複数のコアのゲート長を変動させるシステムおよび方法 Expired - Fee Related JP6360175B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/017,635 2013-09-04
US14/017,635 US9076775B2 (en) 2013-09-04 2013-09-04 System and method of varying gate lengths of multiple cores
PCT/US2014/048944 WO2015034602A1 (en) 2013-09-04 2014-07-30 System and method of varying gate lengths of multiple cores

Publications (3)

Publication Number Publication Date
JP2016534574A JP2016534574A (ja) 2016-11-04
JP2016534574A5 JP2016534574A5 (https=) 2017-08-17
JP6360175B2 true JP6360175B2 (ja) 2018-07-18

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JP2016540885A Expired - Fee Related JP6360175B2 (ja) 2013-09-04 2014-07-30 複数のコアのゲート長を変動させるシステムおよび方法

Country Status (5)

Country Link
US (2) US9076775B2 (https=)
EP (1) EP3042393A1 (https=)
JP (1) JP6360175B2 (https=)
CN (1) CN105518847A (https=)
WO (1) WO2015034602A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9076775B2 (en) 2013-09-04 2015-07-07 Qualcomm Incorporated System and method of varying gate lengths of multiple cores
JP6513450B2 (ja) * 2015-03-26 2019-05-15 三重富士通セミコンダクター株式会社 半導体装置
CN108052838B (zh) * 2017-11-23 2021-12-07 北京智芯微电子科技有限公司 芯片加密设计的泄漏定位系统及方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5600578A (en) 1993-08-02 1997-02-04 Advanced Micro Devices, Inc. Test method for predicting hot-carrier induced leakage over time in short-channel IGFETs and products designed in accordance with test results
JP3152642B2 (ja) 1998-01-29 2001-04-03 三洋電機株式会社 半導体集積回路装置
JP2003282823A (ja) 2002-03-26 2003-10-03 Toshiba Corp 半導体集積回路
US6912705B2 (en) * 2002-06-27 2005-06-28 Sun Microsystems, Inc. Method and apparatus for performing operation on physical design data
CN1965391A (zh) * 2004-05-14 2007-05-16 松下电器产业株式会社 制造半导体器件的方法和设备
US7200824B1 (en) 2004-11-16 2007-04-03 Altera Corporation Performance/power mapping of a die
JP2007081249A (ja) * 2005-09-15 2007-03-29 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2008124393A (ja) * 2006-11-15 2008-05-29 Renesas Technology Corp 半導体装置の製造方法
JP5561922B2 (ja) * 2008-05-20 2014-07-30 三菱電機株式会社 パワー半導体装置
US8302064B1 (en) 2009-03-10 2012-10-30 Xilinx, Inc. Method of product performance improvement by selective feature sizing of semiconductor devices
US8447547B2 (en) * 2009-06-17 2013-05-21 Qualcomm Incorporated Static noise margin estimation
US8924975B2 (en) * 2009-07-23 2014-12-30 Empire Technology Development Llc Core selection for applications running on multiprocessor systems based on core and application characteristics
US8390331B2 (en) 2009-12-29 2013-03-05 Nxp B.V. Flexible CMOS library architecture for leakage power and variability reduction
JP2011253931A (ja) * 2010-06-02 2011-12-15 Panasonic Corp 半導体装置及びその製造方法
US20120042292A1 (en) 2010-08-10 2012-02-16 Stmicroelectronics S.A. Method of synthesis of an electronic circuit
JP5592210B2 (ja) * 2010-09-09 2014-09-17 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8610176B2 (en) 2011-01-11 2013-12-17 Qualcomm Incorporated Standard cell architecture using double poly patterning for multi VT devices
JP2013030602A (ja) 2011-07-28 2013-02-07 Panasonic Corp 半導体集積回路装置
US20130086395A1 (en) 2011-09-30 2013-04-04 Qualcomm Incorporated Multi-Core Microprocessor Reliability Optimization
US9076775B2 (en) 2013-09-04 2015-07-07 Qualcomm Incorporated System and method of varying gate lengths of multiple cores

Also Published As

Publication number Publication date
EP3042393A1 (en) 2016-07-13
CN105518847A (zh) 2016-04-20
US20150311198A1 (en) 2015-10-29
WO2015034602A1 (en) 2015-03-12
US9461040B2 (en) 2016-10-04
US20150061037A1 (en) 2015-03-05
JP2016534574A (ja) 2016-11-04
US9076775B2 (en) 2015-07-07

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