JP6261055B2 - 集積回路モジュール - Google Patents

集積回路モジュール Download PDF

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Publication number
JP6261055B2
JP6261055B2 JP2015552768A JP2015552768A JP6261055B2 JP 6261055 B2 JP6261055 B2 JP 6261055B2 JP 2015552768 A JP2015552768 A JP 2015552768A JP 2015552768 A JP2015552768 A JP 2015552768A JP 6261055 B2 JP6261055 B2 JP 6261055B2
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Japan
Prior art keywords
lead frame
lead
dap
frame
peripheral
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JP2015552768A
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English (en)
Japanese (ja)
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JP2016503240A5 (https=
JP2016503240A (ja
Inventor
ハン メン ユージーン リー リー
ハン メン ユージーン リー リー
ファウジ ビン アブディク アジズ アニス
ファウジ ビン アブディク アジズ アニス
ゴー ゲオク リン スーザン
ゴー ゲオク リン スーザン
スウィー ティアン エヌジー
スウィー ティアン エヌジー
Original Assignee
日本テキサス・インスツルメンツ株式会社
テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
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Publication of JP2016503240A publication Critical patent/JP2016503240A/ja
Publication of JP2016503240A5 publication Critical patent/JP2016503240A5/ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H10W70/427—Bent parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/442—Shapes or dispositions of multiple leadframes in a single chip
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07234—Using a reflow oven
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/796—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
JP2015552768A 2013-01-09 2014-01-09 集積回路モジュール Active JP6261055B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/737,697 2013-01-09
US13/737,697 US8884414B2 (en) 2013-01-09 2013-01-09 Integrated circuit module with dual leadframe
PCT/US2014/010860 WO2014110247A1 (en) 2013-01-09 2014-01-09 Integrated circuit module

Publications (3)

Publication Number Publication Date
JP2016503240A JP2016503240A (ja) 2016-02-01
JP2016503240A5 JP2016503240A5 (https=) 2017-01-26
JP6261055B2 true JP6261055B2 (ja) 2018-01-17

Family

ID=51060383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015552768A Active JP6261055B2 (ja) 2013-01-09 2014-01-09 集積回路モジュール

Country Status (4)

Country Link
US (2) US8884414B2 (https=)
JP (1) JP6261055B2 (https=)
CN (1) CN104956782B (https=)
WO (1) WO2014110247A1 (https=)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
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CN105895606A (zh) * 2014-12-29 2016-08-24 飞思卡尔半导体公司 具有带状线的封装半导体器件
JP1537979S (https=) * 2015-04-20 2015-11-16
JP1537980S (https=) * 2015-04-20 2015-11-16
US9922904B2 (en) * 2015-05-26 2018-03-20 Infineon Technologies Ag Semiconductor device including lead frames with downset
US10381293B2 (en) * 2016-01-21 2019-08-13 Texas Instruments Incorporated Integrated circuit package having an IC die between top and bottom leadframes
US10134660B2 (en) * 2017-03-23 2018-11-20 Nxp Usa, Inc. Semiconductor device having corrugated leads and method for forming
US10636729B2 (en) 2017-06-19 2020-04-28 Texas Instruments Incorporated Integrated circuit package with pre-wetted contact sidewall surfaces
US10896869B2 (en) * 2018-01-12 2021-01-19 Amkor Technology Singapore Holding Pte. Ltd. Method of manufacturing a semiconductor device
US10867894B2 (en) * 2018-10-11 2020-12-15 Asahi Kasei Microdevices Corporation Semiconductor element including encapsulated lead frames
DE102019118174B3 (de) * 2019-07-04 2020-11-26 Infineon Technologies Ag Verarbeitung von einem oder mehreren trägerkörpern und elektronischen komponenten durch mehrfache ausrichtung
US11158567B2 (en) 2019-08-09 2021-10-26 Texas Instruments Incorporated Package with stacked power stage and integrated control die
US11715679B2 (en) 2019-10-09 2023-08-01 Texas Instruments Incorporated Power stage package including flexible circuit and stacked die
US11302615B2 (en) 2019-12-30 2022-04-12 Texas Instruments Incorporated Semiconductor package with isolated heat spreader
US11264310B2 (en) 2020-06-04 2022-03-01 Texas Instruments Incorporated Spring bar leadframe, method and packaged electronic device with zero draft angle
US11450593B2 (en) * 2020-07-02 2022-09-20 Infineon Technologies Ag Spacer frame for semiconductor packages
US11611170B2 (en) 2021-03-23 2023-03-21 Amkor Technology Singapore Holding Pte. Ltd Semiconductor devices having exposed clip top sides and methods of manufacturing semiconductor devices
US11848244B2 (en) * 2021-09-30 2023-12-19 Texas Instruments Incorporated Leaded wafer chip scale packages
US12424523B2 (en) * 2021-12-20 2025-09-23 Texas Instruments Incorporated Leadframe strip with complimentary unit design

Family Cites Families (21)

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US5229329A (en) 1991-02-28 1993-07-20 Texas Instruments, Incorporated Method of manufacturing insulated lead frame for integrated circuits
US5686698A (en) 1994-06-30 1997-11-11 Motorola, Inc. Package for electrical components having a molded structure with a port extending into the molded structure
US5789806A (en) 1995-08-02 1998-08-04 National Semiconductor Corporation Leadframe including bendable support arms for downsetting a die attach pad
JPH1070230A (ja) 1996-08-27 1998-03-10 Hitachi Cable Ltd Ｌｏｃ用リードフレーム
US6603195B1 (en) * 2000-06-28 2003-08-05 International Business Machines Corporation Planarized plastic package modules for integrated circuits
JP3773855B2 (ja) * 2001-11-12 2006-05-10 三洋電機株式会社 リードフレーム
JP2004079760A (ja) * 2002-08-19 2004-03-11 Nec Electronics Corp 半導体装置及びその組立方法
JP4100332B2 (ja) * 2003-11-12 2008-06-11 株式会社デンソー 電子装置およびその製造方法
US7285849B2 (en) * 2005-11-18 2007-10-23 Fairchild Semiconductor Corporation Semiconductor die package using leadframe and clip and method of manufacturing
CN101326636A (zh) * 2005-12-09 2008-12-17 飞兆半导体公司 用于组装顶部与底部暴露的封装半导体的装置和方法
US20070290303A1 (en) 2006-06-07 2007-12-20 Texas Instruments Deutschland Gmbh Dual leadframe semiconductor device package
US20080036078A1 (en) 2006-08-14 2008-02-14 Ciclon Semiconductor Device Corp. Wirebond-less semiconductor package
US20090057855A1 (en) * 2007-08-30 2009-03-05 Maria Clemens Quinones Semiconductor die package including stand off structures
US8049312B2 (en) 2009-01-12 2011-11-01 Texas Instruments Incorporated Semiconductor device package and method of assembly thereof
US8354303B2 (en) 2009-09-29 2013-01-15 Texas Instruments Incorporated Thermally enhanced low parasitic power semiconductor package
US8222716B2 (en) * 2009-10-16 2012-07-17 National Semiconductor Corporation Multiple leadframe package
US8203199B2 (en) 2009-12-10 2012-06-19 National Semiconductor Corporation Tie bar and mold cavity bar arrangements for multiple leadframe stack package
US8304887B2 (en) 2009-12-10 2012-11-06 Texas Instruments Incorporated Module package with embedded substrate and leadframe
WO2011155165A1 (ja) * 2010-06-11 2011-12-15 パナソニック株式会社 樹脂封止型半導体装置及びその製造方法
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JP5410465B2 (ja) * 2011-02-24 2014-02-05 ローム株式会社 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
US9029194B2 (en) 2015-05-12
CN104956782A (zh) 2015-09-30
US20140242755A1 (en) 2014-08-28
WO2014110247A1 (en) 2014-07-17
US20140191381A1 (en) 2014-07-10
CN104956782B (zh) 2018-05-11
US8884414B2 (en) 2014-11-11
JP2016503240A (ja) 2016-02-01

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