JP6214085B2 - 増幅回路 - Google Patents

増幅回路 Download PDF

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Publication number
JP6214085B2
JP6214085B2 JP2013173859A JP2013173859A JP6214085B2 JP 6214085 B2 JP6214085 B2 JP 6214085B2 JP 2013173859 A JP2013173859 A JP 2013173859A JP 2013173859 A JP2013173859 A JP 2013173859A JP 6214085 B2 JP6214085 B2 JP 6214085B2
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Prior art keywords
voltage
output
terminal
amplifier circuit
circuit
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JP2013173859A
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Japanese (ja)
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JP2015041997A5 (enExample
JP2015041997A (ja
Inventor
真吾 井上
真吾 井上
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Sumitomo Electric Device Innovations Inc
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Sumitomo Electric Device Innovations Inc
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Priority to JP2013173859A priority Critical patent/JP6214085B2/ja
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Publication of JP2015041997A5 publication Critical patent/JP2015041997A5/ja
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JP2013173859A 2013-08-23 2013-08-23 増幅回路 Active JP6214085B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2013173859A JP6214085B2 (ja) 2013-08-23 2013-08-23 増幅回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013173859A JP6214085B2 (ja) 2013-08-23 2013-08-23 増幅回路

Publications (3)

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JP2015041997A JP2015041997A (ja) 2015-03-02
JP2015041997A5 JP2015041997A5 (enExample) 2016-10-06
JP6214085B2 true JP6214085B2 (ja) 2017-10-18

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JP2013173859A Active JP6214085B2 (ja) 2013-08-23 2013-08-23 増幅回路

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Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6515545B1 (en) * 2001-08-17 2003-02-04 Harris Corporation RF power amplifier transistor quiescent current checking and adjusting
JP2008177987A (ja) * 2007-01-22 2008-07-31 Nec Corp バイアス回路
JP5267321B2 (ja) * 2009-05-18 2013-08-21 富士通株式会社 増幅器、送信装置および利得補償方法
US8188794B2 (en) * 2010-03-25 2012-05-29 Lloyd Lautzenhiser Method and system for providing automatic gate bias for field effect transistors
JP6097961B2 (ja) * 2011-06-24 2017-03-22 住友電工デバイス・イノベーション株式会社 増幅回路および窒化物半導体装置

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JP2015041997A (ja) 2015-03-02

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