JP2015041997A5 - - Google Patents
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- Publication number
- JP2015041997A5 JP2015041997A5 JP2013173859A JP2013173859A JP2015041997A5 JP 2015041997 A5 JP2015041997 A5 JP 2015041997A5 JP 2013173859 A JP2013173859 A JP 2013173859A JP 2013173859 A JP2013173859 A JP 2013173859A JP 2015041997 A5 JP2015041997 A5 JP 2015041997A5
- Authority
- JP
- Japan
- Prior art keywords
- output
- voltage
- terminal
- end connected
- inductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 239000003990 capacitor Substances 0.000 claims 3
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013173859A JP6214085B2 (ja) | 2013-08-23 | 2013-08-23 | 増幅回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013173859A JP6214085B2 (ja) | 2013-08-23 | 2013-08-23 | 増幅回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015041997A JP2015041997A (ja) | 2015-03-02 |
| JP2015041997A5 true JP2015041997A5 (enExample) | 2016-10-06 |
| JP6214085B2 JP6214085B2 (ja) | 2017-10-18 |
Family
ID=52695887
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013173859A Active JP6214085B2 (ja) | 2013-08-23 | 2013-08-23 | 増幅回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6214085B2 (enExample) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6515545B1 (en) * | 2001-08-17 | 2003-02-04 | Harris Corporation | RF power amplifier transistor quiescent current checking and adjusting |
| JP2008177987A (ja) * | 2007-01-22 | 2008-07-31 | Nec Corp | バイアス回路 |
| JP5267321B2 (ja) * | 2009-05-18 | 2013-08-21 | 富士通株式会社 | 増幅器、送信装置および利得補償方法 |
| US8188794B2 (en) * | 2010-03-25 | 2012-05-29 | Lloyd Lautzenhiser | Method and system for providing automatic gate bias for field effect transistors |
| JP6097961B2 (ja) * | 2011-06-24 | 2017-03-22 | 住友電工デバイス・イノベーション株式会社 | 増幅回路および窒化物半導体装置 |
-
2013
- 2013-08-23 JP JP2013173859A patent/JP6214085B2/ja active Active
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