JP6188473B2 - 薄膜トランジスタアレイ基板およびその製造方法 - Google Patents

薄膜トランジスタアレイ基板およびその製造方法 Download PDF

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Publication number
JP6188473B2
JP6188473B2 JP2013158906A JP2013158906A JP6188473B2 JP 6188473 B2 JP6188473 B2 JP 6188473B2 JP 2013158906 A JP2013158906 A JP 2013158906A JP 2013158906 A JP2013158906 A JP 2013158906A JP 6188473 B2 JP6188473 B2 JP 6188473B2
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opening
interlayer insulating
insulating film
electrode
thin film
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JP2013158906A
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Japanese (ja)
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JP2015031714A (ja
JP2015031714A5 (enExample
Inventor
正美 林
正美 林
橋口　隆史
隆史 橋口
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2013158906A priority Critical patent/JP6188473B2/ja
Priority to US14/340,890 priority patent/US9257454B2/en
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Publication of JP2015031714A5 publication Critical patent/JP2015031714A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions

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  • Liquid Crystal (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP2013158906A 2013-07-31 2013-07-31 薄膜トランジスタアレイ基板およびその製造方法 Active JP6188473B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013158906A JP6188473B2 (ja) 2013-07-31 2013-07-31 薄膜トランジスタアレイ基板およびその製造方法
US14/340,890 US9257454B2 (en) 2013-07-31 2014-07-25 Thin film transistor array substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013158906A JP6188473B2 (ja) 2013-07-31 2013-07-31 薄膜トランジスタアレイ基板およびその製造方法

Publications (3)

Publication Number Publication Date
JP2015031714A JP2015031714A (ja) 2015-02-16
JP2015031714A5 JP2015031714A5 (enExample) 2016-09-15
JP6188473B2 true JP6188473B2 (ja) 2017-08-30

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US (1) US9257454B2 (enExample)
JP (1) JP6188473B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6184268B2 (ja) 2013-09-18 2017-08-23 三菱電機株式会社 薄膜トランジスタアレイ基板およびその製造方法
JP6457879B2 (ja) * 2015-04-22 2019-01-23 株式会社ジャパンディスプレイ 表示装置及びその製造方法
CN106206617A (zh) * 2016-08-29 2016-12-07 武汉华星光电技术有限公司 基于低温多晶硅的阵列基板及其制作方法
JP6792723B2 (ja) * 2017-09-26 2020-11-25 シャープ株式会社 表示デバイス、表示デバイスの製造方法、表示デバイスの製造装置
CN109935580B (zh) * 2017-12-19 2025-01-17 京东方科技集团股份有限公司 基板及其制作方法、电子装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6836301B1 (en) * 1999-06-15 2004-12-28 Advanced Display Inc. Liquid crystal display device
JP4356750B2 (ja) 2007-01-25 2009-11-04 エプソンイメージングデバイス株式会社 液晶表示装置及びその製造方法
JP4487318B2 (ja) * 2007-07-26 2010-06-23 エプソンイメージングデバイス株式会社 液晶表示装置及びその製造方法
JP5079463B2 (ja) * 2007-11-20 2012-11-21 株式会社ジャパンディスプレイウェスト 液晶表示装置及びその製造方法
JP5302122B2 (ja) * 2009-07-08 2013-10-02 株式会社ジャパンディスプレイウェスト 液晶表示パネル
JP5500712B2 (ja) * 2009-09-02 2014-05-21 株式会社ジャパンディスプレイ 液晶表示パネル
US20140340607A1 (en) * 2011-11-18 2014-11-20 Sharp Kabushiki Kaisha Semiconductor device, method for fabricating the semiconductor device and display device
US9035302B2 (en) * 2011-12-28 2015-05-19 Sharp Kabushiki Kaisha Active matrix including stressed capacitor insulation
CN102681276B (zh) * 2012-02-28 2014-07-09 京东方科技集团股份有限公司 阵列基板及其制造方法以及包括该阵列基板的显示装置
JP6347937B2 (ja) * 2013-10-31 2018-06-27 株式会社ジャパンディスプレイ 液晶表示装置

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US9257454B2 (en) 2016-02-09
JP2015031714A (ja) 2015-02-16
US20150034955A1 (en) 2015-02-05

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