JP6100981B1 - 高性能標準セル - Google Patents

高性能標準セル Download PDF

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JP6100981B1
JP6100981B1 JP2016554854A JP2016554854A JP6100981B1 JP 6100981 B1 JP6100981 B1 JP 6100981B1 JP 2016554854 A JP2016554854 A JP 2016554854A JP 2016554854 A JP2016554854 A JP 2016554854A JP 6100981 B1 JP6100981 B1 JP 6100981B1
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gate
cell
continuous
region
local interconnect
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JP2017510069A (ja
Inventor
シャンドン・チェン
オーサン・クウォン
フーア・ヴァン
アニメシュ・ダッタ
セイド・ハディ・ラソーリ
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クアルコム，インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/909—Microarchitecture
    • H10D84/929—Isolations
    • H10D84/931—FET isolation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/909—Microarchitecture
    • H10D84/959—Connectability characteristics, i.e. diffusion and polysilicon geometries
    • H10D84/961—Substrate and well contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/909—Microarchitecture
    • H10D84/959—Connectability characteristics, i.e. diffusion and polysilicon geometries
    • H10D84/966—Gate electrode terminals or contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/0698—Local interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions

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  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
JP2016554854A 2014-03-03 2015-02-19 高性能標準セル Active JP6100981B1 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/195,525 US9318476B2 (en) 2014-03-03 2014-03-03 High performance standard cell with continuous oxide definition and characterized leakage current
US14/195,525 2014-03-03
PCT/US2015/016690 WO2015134202A1 (en) 2014-03-03 2015-02-19 High performance standard cell

Publications (2)

Publication Number Publication Date
JP6100981B1 true JP6100981B1 (ja) 2017-03-22
JP2017510069A JP2017510069A (ja) 2017-04-06

Family

ID=52598835

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JP2016554854A Active JP6100981B1 (ja) 2014-03-03 2015-02-19 高性能標準セル

Country Status (9)

Country Link
US (1) US9318476B2 (enExample)
EP (2) EP3998630A1 (enExample)
JP (1) JP6100981B1 (enExample)
KR (1) KR101724362B1 (enExample)
CN (2) CN106068557B (enExample)
BR (1) BR112016020239B1 (enExample)
CA (1) CA2939202C (enExample)
ES (1) ES2905416T3 (enExample)
WO (1) WO2015134202A1 (enExample)

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US20150311122A1 (en) * 2014-04-28 2015-10-29 Globalfoundries Inc. Forming gate tie between abutting cells and resulting device
US9634026B1 (en) * 2016-07-13 2017-04-25 Qualcomm Incorporated Standard cell architecture for reduced leakage current and improved decoupling capacitance
KR102469885B1 (ko) 2017-09-11 2022-11-22 삼성전자주식회사 반도체 장치
CN109524394B (zh) * 2017-09-18 2021-08-10 联华电子股份有限公司 具有虚置标准单元的集成电路
US10600866B2 (en) * 2018-02-01 2020-03-24 Qualcomm Incorporated Standard cell architecture for gate tie-off
US11068633B2 (en) * 2018-08-31 2021-07-20 Taiwan Semiconductor Manufacturing Company, Ltd. Fault diagnostics
US11030381B2 (en) * 2019-01-16 2021-06-08 Taiwan Semiconductor Manufacturing Co., Ltd. Leakage analysis on semiconductor device
KR102893583B1 (ko) * 2019-11-29 2025-12-01 삼성전자주식회사 표준셀을 포함하는 집적 회로 및 그 레이아웃 방법
US12575187B2 (en) * 2022-03-09 2026-03-10 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of forming the same
WO2024135324A1 (ja) * 2022-12-22 2024-06-27 株式会社ソシオネクスト 半導体集積回路装置

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JP2001127169A (ja) * 1999-10-27 2001-05-11 Mitsubishi Electric Corp 半導体装置およびその製造方法
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Also Published As

Publication number Publication date
KR20160121589A (ko) 2016-10-19
EP3114708B1 (en) 2021-12-29
WO2015134202A1 (en) 2015-09-11
ES2905416T3 (es) 2022-04-08
BR112016020239B1 (pt) 2022-03-08
CA2939202C (en) 2017-08-29
EP3998630A1 (en) 2022-05-18
KR101724362B1 (ko) 2017-04-07
CA2939202A1 (en) 2015-09-11
EP3114708A1 (en) 2017-01-11
CN106068557B (zh) 2020-07-10
CN106068557A (zh) 2016-11-02
BR112016020239A2 (enExample) 2017-08-15
US9318476B2 (en) 2016-04-19
JP2017510069A (ja) 2017-04-06
US20150249076A1 (en) 2015-09-03
CN111326508A (zh) 2020-06-23

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