BR112016020239A2 - - Google Patents
Info
- Publication number
- BR112016020239A2 BR112016020239A2 BR112016020239A BR112016020239A BR112016020239A2 BR 112016020239 A2 BR112016020239 A2 BR 112016020239A2 BR 112016020239 A BR112016020239 A BR 112016020239A BR 112016020239 A BR112016020239 A BR 112016020239A BR 112016020239 A2 BR112016020239 A2 BR 112016020239A2
- Authority
- BR
- Brazil
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
- H10D84/909—Microarchitecture
- H10D84/929—Isolations
- H10D84/931—FET isolation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
- H10D84/909—Microarchitecture
- H10D84/959—Connectability characteristics, i.e. diffusion and polysilicon geometries
- H10D84/961—Substrate and well contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
- H10D84/909—Microarchitecture
- H10D84/959—Connectability characteristics, i.e. diffusion and polysilicon geometries
- H10D84/966—Gate electrode terminals or contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/0698—Local interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0128—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/195,525 US9318476B2 (en) | 2014-03-03 | 2014-03-03 | High performance standard cell with continuous oxide definition and characterized leakage current |
| US14/195,525 | 2014-03-03 | ||
| PCT/US2015/016690 WO2015134202A1 (en) | 2014-03-03 | 2015-02-19 | High performance standard cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| BR112016020239A2 true BR112016020239A2 (enExample) | 2017-08-15 |
| BR112016020239B1 BR112016020239B1 (pt) | 2022-03-08 |
Family
ID=52598835
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112016020239-2A BR112016020239B1 (pt) | 2014-03-03 | 2015-02-19 | Célula padrão de alto desempenho |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US9318476B2 (enExample) |
| EP (2) | EP3998630A1 (enExample) |
| JP (1) | JP6100981B1 (enExample) |
| KR (1) | KR101724362B1 (enExample) |
| CN (2) | CN106068557B (enExample) |
| BR (1) | BR112016020239B1 (enExample) |
| CA (1) | CA2939202C (enExample) |
| ES (1) | ES2905416T3 (enExample) |
| WO (1) | WO2015134202A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4177950A1 (en) * | 2013-12-18 | 2023-05-10 | INTEL Corporation | Heterogeneous layer device |
| US20150311122A1 (en) * | 2014-04-28 | 2015-10-29 | Globalfoundries Inc. | Forming gate tie between abutting cells and resulting device |
| US9634026B1 (en) * | 2016-07-13 | 2017-04-25 | Qualcomm Incorporated | Standard cell architecture for reduced leakage current and improved decoupling capacitance |
| KR102469885B1 (ko) | 2017-09-11 | 2022-11-22 | 삼성전자주식회사 | 반도체 장치 |
| CN109524394B (zh) * | 2017-09-18 | 2021-08-10 | 联华电子股份有限公司 | 具有虚置标准单元的集成电路 |
| US10600866B2 (en) * | 2018-02-01 | 2020-03-24 | Qualcomm Incorporated | Standard cell architecture for gate tie-off |
| US11068633B2 (en) * | 2018-08-31 | 2021-07-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fault diagnostics |
| US11030381B2 (en) * | 2019-01-16 | 2021-06-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Leakage analysis on semiconductor device |
| KR102893583B1 (ko) * | 2019-11-29 | 2025-12-01 | 삼성전자주식회사 | 표준셀을 포함하는 집적 회로 및 그 레이아웃 방법 |
| US12575187B2 (en) * | 2022-03-09 | 2026-03-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit and method of forming the same |
| WO2024135324A1 (ja) * | 2022-12-22 | 2024-06-27 | 株式会社ソシオネクスト | 半導体集積回路装置 |
Family Cites Families (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4570176A (en) * | 1984-04-16 | 1986-02-11 | At&T Bell Laboratories | CMOS Cell array with transistor isolation |
| US5360757A (en) | 1993-03-03 | 1994-11-01 | Motorola, Inc. | Process for fabricating a self aligned interconnect structure in a semiconductor device |
| KR100229577B1 (ko) | 1996-01-31 | 1999-11-15 | 포만 제프리 엘 | 게이트 어레이 셀 및 이것을 포함한 집적 회로 칩 |
| KR100263480B1 (ko) * | 1998-01-13 | 2000-09-01 | 김영환 | 이에스디 보호회로 및 그 제조방법 |
| JP2001127169A (ja) * | 1999-10-27 | 2001-05-11 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP3897730B2 (ja) * | 2003-04-23 | 2007-03-28 | 松下電器産業株式会社 | 半導体記憶装置および半導体集積回路 |
| JP2006059939A (ja) | 2004-08-19 | 2006-03-02 | Fujitsu Ltd | Ｍｉｓキャパシタおよびｍｉｓキャパシタ作成方法 |
| US7920403B2 (en) | 2005-07-27 | 2011-04-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | ROM cell array structure |
| US9009641B2 (en) | 2006-03-09 | 2015-04-14 | Tela Innovations, Inc. | Circuits with linear finfet structures |
| JP2008118004A (ja) * | 2006-11-07 | 2008-05-22 | Nec Electronics Corp | 半導体集積回路 |
| JP4543061B2 (ja) * | 2007-05-15 | 2010-09-15 | 株式会社東芝 | 半導体集積回路 |
| US7681164B2 (en) | 2007-08-31 | 2010-03-16 | Synopsys, Inc. | Method and apparatus for placing an integrated circuit device within an integrated circuit layout |
| JP2009135223A (ja) * | 2007-11-29 | 2009-06-18 | Oki Semiconductor Co Ltd | 半導体装置およびその製造方法 |
| EP2251901A4 (en) * | 2007-12-14 | 2012-08-29 | Fujitsu Ltd | SEMICONDUCTOR COMPONENT |
| JP4907563B2 (ja) * | 2008-01-16 | 2012-03-28 | パナソニック株式会社 | 半導体記憶装置 |
| JP5230251B2 (ja) * | 2008-04-25 | 2013-07-10 | パナソニック株式会社 | 標準セルのレイアウト構造、標準セルライブラリ、及び半導体集積回路のレイアウト構造 |
| JP5064321B2 (ja) | 2008-07-09 | 2012-10-31 | パナソニック株式会社 | 半導体装置 |
| DE102008045037B4 (de) * | 2008-08-29 | 2010-12-30 | Advanced Micro Devices, Inc., Sunnyvale | Statischer RAM-Zellenaufbau und Mehrfachkontaktschema zum Anschluss von Doppelkanaltransistoren |
| US7745275B2 (en) | 2008-09-10 | 2010-06-29 | Arm Limited | Integrated circuit and a method of making an integrated circuit to provide a gate contact over a diffusion region |
| US8138554B2 (en) | 2008-09-17 | 2012-03-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device with local interconnects |
| US7808051B2 (en) | 2008-09-29 | 2010-10-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Standard cell without OD space effect in Y-direction |
| GB2466313A (en) | 2008-12-22 | 2010-06-23 | Cambridge Silicon Radio Ltd | Radio Frequency CMOS Transistor |
| US8120939B2 (en) | 2009-09-24 | 2012-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | ROM cell having an isolation transistor formed between first and second pass transistors and connected between a differential bitline pair |
| US8324668B2 (en) * | 2009-12-17 | 2012-12-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dummy structure for isolating devices in integrated circuits |
| US8390331B2 (en) | 2009-12-29 | 2013-03-05 | Nxp B.V. | Flexible CMOS library architecture for leakage power and variability reduction |
| JP5685457B2 (ja) * | 2010-04-02 | 2015-03-18 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
| US9219005B2 (en) | 2011-06-28 | 2015-12-22 | Monolithic 3D Inc. | Semiconductor system and device |
| DE102011004323B4 (de) | 2011-02-17 | 2016-02-25 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Halbleiterbauelement mit selbstjustierten Kontaktelementen und Verfahren zu seiner Herstellung |
| US8482314B2 (en) | 2011-11-08 | 2013-07-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and apparatus for improved multiplexing using tri-state inverter |
| US9006841B2 (en) | 2011-12-30 | 2015-04-14 | Stmicroelectronics International N.V. | Dual port SRAM having reduced cell size and rectangular shape |
| US8750011B2 (en) | 2012-03-19 | 2014-06-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Apparatus for ROM cells |
| KR101983633B1 (ko) * | 2012-11-30 | 2019-05-29 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
| US9997617B2 (en) * | 2013-03-13 | 2018-06-12 | Qualcomm Incorporated | Metal oxide semiconductor (MOS) isolation schemes with continuous active areas separated by dummy gates and related methods |
| US9024418B2 (en) | 2013-03-14 | 2015-05-05 | Qualcomm Incorporated | Local interconnect structures for high density |
-
2014
- 2014-03-03 US US14/195,525 patent/US9318476B2/en active Active
-
2015
- 2015-02-19 EP EP21216285.3A patent/EP3998630A1/en active Pending
- 2015-02-19 WO PCT/US2015/016690 patent/WO2015134202A1/en not_active Ceased
- 2015-02-19 CN CN201580011681.4A patent/CN106068557B/zh active Active
- 2015-02-19 CA CA2939202A patent/CA2939202C/en active Active
- 2015-02-19 KR KR1020167027270A patent/KR101724362B1/ko active Active
- 2015-02-19 ES ES15707848T patent/ES2905416T3/es active Active
- 2015-02-19 BR BR112016020239-2A patent/BR112016020239B1/pt active IP Right Grant
- 2015-02-19 CN CN202010227403.5A patent/CN111326508A/zh active Pending
- 2015-02-19 EP EP15707848.6A patent/EP3114708B1/en active Active
- 2015-02-19 JP JP2016554854A patent/JP6100981B1/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP6100981B1 (ja) | 2017-03-22 |
| KR20160121589A (ko) | 2016-10-19 |
| EP3114708B1 (en) | 2021-12-29 |
| WO2015134202A1 (en) | 2015-09-11 |
| ES2905416T3 (es) | 2022-04-08 |
| BR112016020239B1 (pt) | 2022-03-08 |
| CA2939202C (en) | 2017-08-29 |
| EP3998630A1 (en) | 2022-05-18 |
| KR101724362B1 (ko) | 2017-04-07 |
| CA2939202A1 (en) | 2015-09-11 |
| EP3114708A1 (en) | 2017-01-11 |
| CN106068557B (zh) | 2020-07-10 |
| CN106068557A (zh) | 2016-11-02 |
| US9318476B2 (en) | 2016-04-19 |
| JP2017510069A (ja) | 2017-04-06 |
| US20150249076A1 (en) | 2015-09-03 |
| CN111326508A (zh) | 2020-06-23 |
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| B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
| B350 | Update of information on the portal [chapter 15.35 patent gazette] | ||
| B350 | Update of information on the portal [chapter 15.35 patent gazette] | ||
| B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
| B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 19/02/2015, OBSERVADAS AS CONDICOES LEGAIS. |