JP6073862B2 - ドリフト領域の下にキャビティを備えるdmosトランジスタ - Google Patents
ドリフト領域の下にキャビティを備えるdmosトランジスタ Download PDFInfo
- Publication number
- JP6073862B2 JP6073862B2 JP2014508559A JP2014508559A JP6073862B2 JP 6073862 B2 JP6073862 B2 JP 6073862B2 JP 2014508559 A JP2014508559 A JP 2014508559A JP 2014508559 A JP2014508559 A JP 2014508559A JP 6073862 B2 JP6073862 B2 JP 6073862B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- dmos transistor
- contact
- insulating layer
- single crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
- H10D30/0285—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs using formation of insulating sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/65—Lateral DMOS [LDMOS] FETs
- H10D30/657—Lateral DMOS [LDMOS] FETs having substrates comprising insulating layers, e.g. SOI-LDMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
- H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/157—Impurity concentrations or distributions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface
Landscapes
- Thin Film Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/094,645 US8524548B2 (en) | 2011-04-26 | 2011-04-26 | DMOS Transistor with a cavity that lies below the drift region |
| US13/094,645 | 2011-04-26 | ||
| PCT/US2012/035249 WO2012149184A2 (en) | 2011-04-26 | 2012-04-26 | Dmos transistor with cavity below drift region |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014517509A JP2014517509A (ja) | 2014-07-17 |
| JP2014517509A5 JP2014517509A5 (https=) | 2015-06-18 |
| JP6073862B2 true JP6073862B2 (ja) | 2017-02-01 |
Family
ID=47067253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014508559A Active JP6073862B2 (ja) | 2011-04-26 | 2012-04-26 | ドリフト領域の下にキャビティを備えるdmosトランジスタ |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8524548B2 (https=) |
| EP (1) | EP2724378B1 (https=) |
| JP (1) | JP6073862B2 (https=) |
| CN (1) | CN103503151B (https=) |
| WO (1) | WO2012149184A2 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9455339B2 (en) * | 2014-09-09 | 2016-09-27 | Macronix International Co., Ltd. | High voltage device and method for manufacturing the same |
| CN105023938B (zh) * | 2015-08-25 | 2018-08-24 | 西华大学 | 一种soi横向功率器件耐压结构及其制备方法 |
| US10854455B2 (en) * | 2016-11-21 | 2020-12-01 | Marvell Asia Pte, Ltd. | Methods and apparatus for fabricating IC chips with tilted patterning |
| JP2018125518A (ja) * | 2017-02-03 | 2018-08-09 | ソニーセミコンダクタソリューションズ株式会社 | トランジスタ、製造方法 |
| CN117012835B (zh) * | 2023-10-07 | 2024-01-23 | 粤芯半导体技术股份有限公司 | 横向扩散金属氧化物半导体器件及其制造方法 |
| CN117116971A (zh) * | 2023-10-24 | 2023-11-24 | 绍兴中芯集成电路制造股份有限公司 | Soi衬底及其制备方法、晶体管及其制备方法 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5389569A (en) * | 1992-03-03 | 1995-02-14 | Motorola, Inc. | Vertical and lateral isolation for a semiconductor device |
| JP2739018B2 (ja) * | 1992-10-21 | 1998-04-08 | 三菱電機株式会社 | 誘電体分離半導体装置及びその製造方法 |
| US6211551B1 (en) * | 1997-06-30 | 2001-04-03 | Matsushita Electric Works, Ltd. | Solid-state relay |
| US6307247B1 (en) * | 1999-07-12 | 2001-10-23 | Robert Bruce Davies | Monolithic low dielectric constant platform for passive components and method |
| EP1113492B9 (en) * | 1999-12-31 | 2010-02-03 | STMicroelectronics S.r.l. | Method for manufacturimg a SOI wafer |
| KR100841141B1 (ko) | 2000-09-21 | 2008-06-24 | 캠브리지 세미컨덕터 리미티드 | 반도체 장치 및 반도체 장치의 형성 방법 |
| JP2002110987A (ja) * | 2000-09-26 | 2002-04-12 | Matsushita Electric Works Ltd | 半導体装置及びその製造方法 |
| WO2004004013A1 (en) * | 2002-06-26 | 2004-01-08 | Cambridge Semiconductor Limited | Lateral semiconductor device |
| US7153753B2 (en) | 2003-08-05 | 2006-12-26 | Micron Technology, Inc. | Strained Si/SiGe/SOI islands and processes of making same |
| GB0411971D0 (en) | 2004-05-28 | 2004-06-30 | Koninkl Philips Electronics Nv | Semiconductor device and method for manufacture |
| JP4624084B2 (ja) * | 2004-11-24 | 2011-02-02 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
| JP4559839B2 (ja) * | 2004-12-13 | 2010-10-13 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
| CN100557786C (zh) * | 2005-04-14 | 2009-11-04 | Nxp股份有限公司 | 半导体器件及其制造方法 |
| US7489018B2 (en) | 2005-04-19 | 2009-02-10 | Kabushiki Kaisha Toshiba | Transistor |
| WO2006117734A1 (en) * | 2005-05-03 | 2006-11-09 | Nxp B.V. | Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method |
| JP5017926B2 (ja) * | 2005-09-28 | 2012-09-05 | 株式会社デンソー | 半導体装置およびその製造方法 |
| JP4933776B2 (ja) * | 2005-12-07 | 2012-05-16 | ラピスセミコンダクタ株式会社 | 半導体装置およびその製造方法 |
| US7602037B2 (en) | 2007-03-28 | 2009-10-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | High voltage semiconductor devices and methods for fabricating the same |
| JP2010251344A (ja) * | 2009-04-10 | 2010-11-04 | Hitachi Ltd | 半導体装置およびその製造方法 |
| US8482031B2 (en) | 2009-09-09 | 2013-07-09 | Cambridge Semiconductor Limited | Lateral insulated gate bipolar transistors (LIGBTS) |
-
2011
- 2011-04-26 US US13/094,645 patent/US8524548B2/en active Active
-
2012
- 2012-04-26 EP EP12776943.8A patent/EP2724378B1/en active Active
- 2012-04-26 JP JP2014508559A patent/JP6073862B2/ja active Active
- 2012-04-26 CN CN201280020245.XA patent/CN103503151B/zh active Active
- 2012-04-26 WO PCT/US2012/035249 patent/WO2012149184A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| CN103503151B (zh) | 2016-08-24 |
| EP2724378A4 (en) | 2015-07-29 |
| EP2724378B1 (en) | 2020-01-22 |
| WO2012149184A2 (en) | 2012-11-01 |
| WO2012149184A3 (en) | 2013-01-10 |
| US8524548B2 (en) | 2013-09-03 |
| CN103503151A (zh) | 2014-01-08 |
| US20120273881A1 (en) | 2012-11-01 |
| EP2724378A2 (en) | 2014-04-30 |
| JP2014517509A (ja) | 2014-07-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11610968B2 (en) | LDMOS transistor and method of forming the LDMOS transistor with improved Rds*Cgd | |
| US9842903B2 (en) | Integrated circuits with laterally diffused metal oxide semiconductor structures and methods for fabricating the same | |
| CN101764159B (zh) | 带有减小的击穿电压的金属氧化物半导体场效应管器件 | |
| JP6073862B2 (ja) | ドリフト領域の下にキャビティを備えるdmosトランジスタ | |
| US9899477B2 (en) | Edge termination structure having a termination charge region below a recessed field oxide region | |
| US20100237411A1 (en) | LDMOS with double LDD and trenched drain | |
| JP2012033599A (ja) | 半導体装置の製造方法及び半導体装置 | |
| JP2011109100A (ja) | 非対称スペーサをゲートとして備えるldmosトランジスタ | |
| KR101912030B1 (ko) | 결합된 게이트 및 소스 트렌치 형성 및 관련 구조 | |
| JP4567969B2 (ja) | 半導体素子のトランジスタ製造方法 | |
| CN115642180A (zh) | 具有深耗尽沟道的半导体装置及其制造方法 | |
| US9818859B2 (en) | Quasi-vertical power MOSFET and methods of forming the same | |
| US10741687B2 (en) | Trench DMOS transistor with reduced gate-to-drain capacitance | |
| EP2724377B1 (en) | Dmos transistor with a slanted super junction drift structure | |
| KR20190090270A (ko) | 반도체 소자 및 그 제조 방법 | |
| CN112864223A (zh) | 半导体晶体管及其制作方法 | |
| TWM620290U (zh) | 整合型溝道分離式功率元件 | |
| US11545396B2 (en) | Semiconductor structure and method for forming the same | |
| CN108682686B (zh) | 一种深槽半导体器件耐压终端及其制造方法 | |
| KR20180087535A (ko) | 차폐형 게이트 구조의 전력 mosfet | |
| KR100298194B1 (ko) | 트렌치 게이트 구조를 갖는 전력소자 | |
| KR101301583B1 (ko) | 전력용 반도체소자의 제조방법 | |
| CN111092113A (zh) | 金氧半场效应晶体管的终端区结构及其制造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150421 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150421 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160524 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20160824 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20161024 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20161124 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20161215 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20170105 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6073862 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |