CN103503151B - 具有在漂移区下面的腔体的dmos晶体管 - Google Patents

具有在漂移区下面的腔体的dmos晶体管 Download PDF

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Publication number
CN103503151B
CN103503151B CN201280020245.XA CN201280020245A CN103503151B CN 103503151 B CN103503151 B CN 103503151B CN 201280020245 A CN201280020245 A CN 201280020245A CN 103503151 B CN103503151 B CN 103503151B
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China
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region
layer
forming
single crystal
top surface
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CN201280020245.XA
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English (en)
Chinese (zh)
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CN103503151A (zh
Inventor
W·弗兰茨
V·瓦施琛克
R·W·弗提
A·萨多夫尼科夫
P·博拉
P·J·浩珀
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Texas Instruments Inc
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Texas Instruments Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
    • H10D30/0285—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs using formation of insulating sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
    • H10D30/657—Lateral DMOS [LDMOS] FETs having substrates comprising insulating layers, e.g. SOI-LDMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H10D62/157—Impurity concentrations or distributions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

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  • Thin Film Transistor (AREA)
CN201280020245.XA 2011-04-26 2012-04-26 具有在漂移区下面的腔体的dmos晶体管 Active CN103503151B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/094,645 US8524548B2 (en) 2011-04-26 2011-04-26 DMOS Transistor with a cavity that lies below the drift region
US13/094,645 2011-04-26
PCT/US2012/035249 WO2012149184A2 (en) 2011-04-26 2012-04-26 Dmos transistor with cavity below drift region

Publications (2)

Publication Number Publication Date
CN103503151A CN103503151A (zh) 2014-01-08
CN103503151B true CN103503151B (zh) 2016-08-24

Family

ID=47067253

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201280020245.XA Active CN103503151B (zh) 2011-04-26 2012-04-26 具有在漂移区下面的腔体的dmos晶体管

Country Status (5)

Country Link
US (1) US8524548B2 (https=)
EP (1) EP2724378B1 (https=)
JP (1) JP6073862B2 (https=)
CN (1) CN103503151B (https=)
WO (1) WO2012149184A2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9455339B2 (en) * 2014-09-09 2016-09-27 Macronix International Co., Ltd. High voltage device and method for manufacturing the same
CN105023938B (zh) * 2015-08-25 2018-08-24 西华大学 一种soi横向功率器件耐压结构及其制备方法
US10854455B2 (en) * 2016-11-21 2020-12-01 Marvell Asia Pte, Ltd. Methods and apparatus for fabricating IC chips with tilted patterning
JP2018125518A (ja) * 2017-02-03 2018-08-09 ソニーセミコンダクタソリューションズ株式会社 トランジスタ、製造方法
CN117012835B (zh) * 2023-10-07 2024-01-23 粤芯半导体技术股份有限公司 横向扩散金属氧化物半导体器件及其制造方法
CN117116971A (zh) * 2023-10-24 2023-11-24 绍兴中芯集成电路制造股份有限公司 Soi衬底及其制备方法、晶体管及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5561077A (en) * 1992-10-21 1996-10-01 Mitsubishi Denki Kabushiki Kaisha Dielectric element isolated semiconductor device and a method of manufacturing the same
US6580126B1 (en) * 1997-06-30 2003-06-17 Matsushita Electric Works, Ltd. Solid-state relay
US20060231894A1 (en) * 2005-04-19 2006-10-19 Kabushiki Kaisha Toshiba Transistor
US20090127615A1 (en) * 2005-04-14 2009-05-21 Nxp B.V. Semiconductor device and method for manufacture
US20100258869A1 (en) * 2009-04-10 2010-10-14 Hitachi, Ltd. Semiconductor device and manufacturing method thereof

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5389569A (en) * 1992-03-03 1995-02-14 Motorola, Inc. Vertical and lateral isolation for a semiconductor device
US6307247B1 (en) * 1999-07-12 2001-10-23 Robert Bruce Davies Monolithic low dielectric constant platform for passive components and method
EP1113492B9 (en) * 1999-12-31 2010-02-03 STMicroelectronics S.r.l. Method for manufacturimg a SOI wafer
KR100841141B1 (ko) 2000-09-21 2008-06-24 캠브리지 세미컨덕터 리미티드 반도체 장치 및 반도체 장치의 형성 방법
JP2002110987A (ja) * 2000-09-26 2002-04-12 Matsushita Electric Works Ltd 半導体装置及びその製造方法
WO2004004013A1 (en) * 2002-06-26 2004-01-08 Cambridge Semiconductor Limited Lateral semiconductor device
US7153753B2 (en) 2003-08-05 2006-12-26 Micron Technology, Inc. Strained Si/SiGe/SOI islands and processes of making same
GB0411971D0 (en) 2004-05-28 2004-06-30 Koninkl Philips Electronics Nv Semiconductor device and method for manufacture
JP4624084B2 (ja) * 2004-11-24 2011-02-02 トヨタ自動車株式会社 半導体装置とその製造方法
JP4559839B2 (ja) * 2004-12-13 2010-10-13 トヨタ自動車株式会社 半導体装置の製造方法
WO2006117734A1 (en) * 2005-05-03 2006-11-09 Nxp B.V. Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method
JP5017926B2 (ja) * 2005-09-28 2012-09-05 株式会社デンソー 半導体装置およびその製造方法
JP4933776B2 (ja) * 2005-12-07 2012-05-16 ラピスセミコンダクタ株式会社 半導体装置およびその製造方法
US7602037B2 (en) 2007-03-28 2009-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. High voltage semiconductor devices and methods for fabricating the same
US8482031B2 (en) 2009-09-09 2013-07-09 Cambridge Semiconductor Limited Lateral insulated gate bipolar transistors (LIGBTS)

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5561077A (en) * 1992-10-21 1996-10-01 Mitsubishi Denki Kabushiki Kaisha Dielectric element isolated semiconductor device and a method of manufacturing the same
US6580126B1 (en) * 1997-06-30 2003-06-17 Matsushita Electric Works, Ltd. Solid-state relay
US20090127615A1 (en) * 2005-04-14 2009-05-21 Nxp B.V. Semiconductor device and method for manufacture
US20060231894A1 (en) * 2005-04-19 2006-10-19 Kabushiki Kaisha Toshiba Transistor
US20100258869A1 (en) * 2009-04-10 2010-10-14 Hitachi, Ltd. Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
EP2724378A4 (en) 2015-07-29
EP2724378B1 (en) 2020-01-22
WO2012149184A2 (en) 2012-11-01
WO2012149184A3 (en) 2013-01-10
US8524548B2 (en) 2013-09-03
CN103503151A (zh) 2014-01-08
US20120273881A1 (en) 2012-11-01
EP2724378A2 (en) 2014-04-30
JP6073862B2 (ja) 2017-02-01
JP2014517509A (ja) 2014-07-17

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