JP6029873B2 - 配線基板、配線基板の製造方法及び半導体装置の製造方法 - Google Patents

配線基板、配線基板の製造方法及び半導体装置の製造方法 Download PDF

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Publication number
JP6029873B2
JP6029873B2 JP2012147389A JP2012147389A JP6029873B2 JP 6029873 B2 JP6029873 B2 JP 6029873B2 JP 2012147389 A JP2012147389 A JP 2012147389A JP 2012147389 A JP2012147389 A JP 2012147389A JP 6029873 B2 JP6029873 B2 JP 6029873B2
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Japan
Prior art keywords
layer
adhesive layer
support substrate
pad
adhesive
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JP2012147389A
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English (en)
Japanese (ja)
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JP2014011335A (ja
JP2014011335A5 (https=
Inventor
中村　敦
敦 中村
三喜 今井
三喜 今井
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Publication date
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Priority to JP2012147389A priority Critical patent/JP6029873B2/ja
Priority to US13/926,214 priority patent/US8945336B2/en
Publication of JP2014011335A publication Critical patent/JP2014011335A/ja
Publication of JP2014011335A5 publication Critical patent/JP2014011335A5/ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/413—Insulating or insulated substrates serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
JP2012147389A 2012-06-29 2012-06-29 配線基板、配線基板の製造方法及び半導体装置の製造方法 Active JP6029873B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012147389A JP6029873B2 (ja) 2012-06-29 2012-06-29 配線基板、配線基板の製造方法及び半導体装置の製造方法
US13/926,214 US8945336B2 (en) 2012-06-29 2013-06-25 Wiring substrate and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012147389A JP6029873B2 (ja) 2012-06-29 2012-06-29 配線基板、配線基板の製造方法及び半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2014011335A JP2014011335A (ja) 2014-01-20
JP2014011335A5 JP2014011335A5 (https=) 2015-08-06
JP6029873B2 true JP6029873B2 (ja) 2016-11-24

Family

ID=49777270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012147389A Active JP6029873B2 (ja) 2012-06-29 2012-06-29 配線基板、配線基板の製造方法及び半導体装置の製造方法

Country Status (2)

Country Link
US (1) US8945336B2 (https=)
JP (1) JP6029873B2 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI588912B (zh) * 2014-02-13 2017-06-21 群成科技股份有限公司 電子封裝件、封裝載板及兩者的製造方法
KR20160001169A (ko) * 2014-06-26 2016-01-06 삼성전자주식회사 마킹층을 포함하는 반도체 패키지
JP2016122802A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置
JP2017157593A (ja) * 2016-02-29 2017-09-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 発光ダイオード、発光ダイオードの製造方法、発光ダイオード表示装置及び発光ダイオード表示装置の製造方法
CN114080088B (zh) * 2020-08-10 2024-05-31 鹏鼎控股(深圳)股份有限公司 电路板及其制备方法
US20230106612A1 (en) * 2021-10-05 2023-04-06 Advanced Semiconductor Engineering, Inc. Method of manufacturing electrical package
JP7816857B2 (ja) * 2022-09-15 2026-02-18 住友電工デバイス・イノベーション株式会社 半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1213754A3 (en) * 1994-03-18 2005-05-25 Hitachi Chemical Co., Ltd. Fabrication process of semiconductor package and semiconductor package
JP3529507B2 (ja) * 1995-09-04 2004-05-24 沖電気工業株式会社 半導体装置
JPH10270592A (ja) * 1997-03-24 1998-10-09 Texas Instr Japan Ltd 半導体装置及びその製造方法
JP4103482B2 (ja) * 2002-07-16 2008-06-18 日立化成工業株式会社 半導体搭載基板とそれを用いた半導体パッケージ並びにそれらの製造方法
US7556984B2 (en) * 2005-06-17 2009-07-07 Boardtek Electronics Corp. Package structure of chip and the package method thereof
JP4984502B2 (ja) 2005-11-28 2012-07-25 凸版印刷株式会社 Ｂｇａ型キャリア基板の製造方法及びｂｇａ型キャリア基板
JP2007150099A (ja) * 2005-11-29 2007-06-14 Hitachi Cable Ltd 配線基板及びその製造方法並びに配線基板を用いた電子部品の製造方法及びその装置
US8288869B2 (en) * 2009-05-13 2012-10-16 Advanced Semiconductor Engineering, Inc. Semiconductor package with substrate having single metal layer and manufacturing methods thereof

Also Published As

Publication number Publication date
US20140001648A1 (en) 2014-01-02
JP2014011335A (ja) 2014-01-20
US8945336B2 (en) 2015-02-03

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