JP6026270B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6026270B2 JP6026270B2 JP2012286531A JP2012286531A JP6026270B2 JP 6026270 B2 JP6026270 B2 JP 6026270B2 JP 2012286531 A JP2012286531 A JP 2012286531A JP 2012286531 A JP2012286531 A JP 2012286531A JP 6026270 B2 JP6026270 B2 JP 6026270B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- internal
- vdd
- voltage
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/263—Arrangements for using multiple switchable power supplies, e.g. battery and AC
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Dram (AREA)
- Power Sources (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012286531A JP6026270B2 (ja) | 2012-12-28 | 2012-12-28 | 半導体装置 |
| US14/134,537 US9727106B2 (en) | 2012-12-28 | 2013-12-19 | Semiconductor device having active mode and standby mode |
| US15/649,051 US10268250B2 (en) | 2012-12-28 | 2017-07-13 | Semiconductor device having active mode and standby mode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012286531A JP6026270B2 (ja) | 2012-12-28 | 2012-12-28 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014130406A JP2014130406A (ja) | 2014-07-10 |
| JP2014130406A5 JP2014130406A5 (enExample) | 2015-10-15 |
| JP6026270B2 true JP6026270B2 (ja) | 2016-11-16 |
Family
ID=51018733
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012286531A Active JP6026270B2 (ja) | 2012-12-28 | 2012-12-28 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US9727106B2 (enExample) |
| JP (1) | JP6026270B2 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6492507B2 (ja) * | 2014-10-06 | 2019-04-03 | 株式会社デンソー | 電子制御装置 |
| JP2016092536A (ja) * | 2014-10-31 | 2016-05-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP6779960B2 (ja) * | 2018-11-07 | 2020-11-04 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US11009902B1 (en) | 2020-02-27 | 2021-05-18 | Micron Technology, Inc. | Power voltage selection circuit |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3195052B2 (ja) * | 1992-06-25 | 2001-08-06 | ローム株式会社 | 電源切換え回路 |
| JPH0749729A (ja) * | 1993-08-04 | 1995-02-21 | Seiko Epson Corp | 電源切り換え回路およびicカード |
| US6281724B1 (en) * | 1998-11-17 | 2001-08-28 | Analog Devices, Inc. | Circuit for partial power-down on dual voltage supply integrated circuits |
| KR100603926B1 (ko) * | 1999-10-25 | 2006-07-24 | 삼성전자주식회사 | 여러 전원 관리 상태를 갖는 컴퓨터 시스템을 위한 전원 공급 제어 회로 및 그의 제어 방법 |
| CN1679109B (zh) * | 2002-08-28 | 2011-06-15 | Nxp股份有限公司 | 减小状态保持电路功耗的方法、状态保持电路以及电子器件 |
| US7202729B2 (en) * | 2004-10-21 | 2007-04-10 | Texas Instruments Incorporated | Methods and apparatus to bias the backgate of a power switch |
| JP5098367B2 (ja) | 2007-03-06 | 2012-12-12 | 富士通セミコンダクター株式会社 | 電源電圧調整回路およびマイクロコンピュータ |
| JP5706635B2 (ja) * | 2010-06-24 | 2015-04-22 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその内部回路の制御方法 |
| TWI449286B (zh) * | 2010-07-27 | 2014-08-11 | Realtek Semiconductor Corp | 電源切換方法與電路 |
| JP2012230737A (ja) * | 2011-04-26 | 2012-11-22 | Elpida Memory Inc | 半導体装置 |
| US8314632B1 (en) * | 2011-07-29 | 2012-11-20 | Lattice Semiconductor Corporation | Method and system for placing integrated circuits into predominantly ultra-low voltage mode for standby purposes |
| JP5843836B2 (ja) * | 2012-11-30 | 2016-01-13 | キヤノン株式会社 | 電力供給回路 |
-
2012
- 2012-12-28 JP JP2012286531A patent/JP6026270B2/ja active Active
-
2013
- 2013-12-19 US US14/134,537 patent/US9727106B2/en active Active
-
2017
- 2017-07-13 US US15/649,051 patent/US10268250B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US10268250B2 (en) | 2019-04-23 |
| JP2014130406A (ja) | 2014-07-10 |
| US9727106B2 (en) | 2017-08-08 |
| US20140189381A1 (en) | 2014-07-03 |
| US20170308138A1 (en) | 2017-10-26 |
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