JP5960724B2 - 多層酸窒化物層を有する酸化物−窒化物−酸化物積層体 - Google Patents

多層酸窒化物層を有する酸化物−窒化物−酸化物積層体 Download PDF

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JP5960724B2
JP5960724B2 JP2013549612A JP2013549612A JP5960724B2 JP 5960724 B2 JP5960724 B2 JP 5960724B2 JP 2013549612 A JP2013549612 A JP 2013549612A JP 2013549612 A JP2013549612 A JP 2013549612A JP 5960724 B2 JP5960724 B2 JP 5960724B2
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layer
oxynitride
oxynitride layer
silicon
oxide
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Japanese (ja)
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JP2014504027A (ja
Inventor
レヴィー サジー
レヴィー サジー
ラムクマー クリシュナスワミー
ラムクマー クリシュナスワミー
ジェン フレドリック
ジェン フレドリック
ゲハ サム
ゲハ サム
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Cypress Semiconductor Corp
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Cypress Semiconductor Corp
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Priority claimed from US13/007,533 external-priority patent/US8643124B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Formation Of Insulating Films (AREA)
JP2013549612A 2011-01-14 2012-01-17 多層酸窒化物層を有する酸化物−窒化物−酸化物積層体 Active JP5960724B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/007,533 US8643124B2 (en) 2007-05-25 2011-01-14 Oxide-nitride-oxide stack having multiple oxynitride layers
US13/007,533 2011-01-14
PCT/US2012/021583 WO2012097373A1 (en) 2011-01-14 2012-01-17 Oxide-nitride-oxide stack having multiple oxynitride layers

Related Child Applications (1)

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JP2016123646A Division JP6258412B2 (ja) 2011-01-14 2016-06-22 多層酸窒化物層を有する酸化物−窒化物−酸化物積層体

Publications (2)

Publication Number Publication Date
JP2014504027A JP2014504027A (ja) 2014-02-13
JP5960724B2 true JP5960724B2 (ja) 2016-08-02

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JP2013549612A Active JP5960724B2 (ja) 2011-01-14 2012-01-17 多層酸窒化物層を有する酸化物−窒化物−酸化物積層体
JP2016123646A Active JP6258412B2 (ja) 2011-01-14 2016-06-22 多層酸窒化物層を有する酸化物−窒化物−酸化物積層体

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Country Status (5)

Country Link
JP (2) JP5960724B2 (zh)
KR (1) KR20140025262A (zh)
CN (1) CN102714223A (zh)
TW (1) TWI534897B (zh)
WO (1) WO2012097373A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3709370A1 (en) * 2012-03-31 2020-09-16 Longitude Flash Memory Solutions Ltd. Oxide-nitride-oxide stack having multiple oxynitride layers

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Publication number Priority date Publication date Assignee Title
US6153543A (en) * 1999-08-09 2000-11-28 Lucent Technologies Inc. High density plasma passivation layer and method of application
JP2002261175A (ja) * 2000-12-28 2002-09-13 Sony Corp 不揮発性半導体記憶装置およびその製造方法
US6812084B2 (en) * 2002-12-09 2004-11-02 Progressant Technologies, Inc. Adaptive negative differential resistance device
US20050109276A1 (en) * 2003-11-25 2005-05-26 Applied Materials, Inc. Thermal chemical vapor deposition of silicon nitride using BTBAS bis(tertiary-butylamino silane) in a single wafer chamber
JP4477422B2 (ja) * 2004-06-07 2010-06-09 株式会社ルネサステクノロジ 不揮発性半導体記憶装置の製造方法
US7612403B2 (en) * 2005-05-17 2009-11-03 Micron Technology, Inc. Low power non-volatile memory and gate stack
US7227786B1 (en) * 2005-07-05 2007-06-05 Mammen Thomas Location-specific NAND (LS NAND) memory technology and cells
KR100813964B1 (ko) * 2005-09-22 2008-03-14 삼성전자주식회사 어레이 타입 프린트헤드 및 이를 구비한 잉크젯화상형성장치
WO2007064048A1 (ja) * 2005-12-02 2007-06-07 Nec Corporation 半導体記憶装置、その駆動方法およびその製造方法
JP5285235B2 (ja) * 2006-04-28 2013-09-11 株式会社半導体エネルギー研究所 半導体装置
US7692223B2 (en) * 2006-04-28 2010-04-06 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and method for manufacturing the same
US8614124B2 (en) * 2007-05-25 2013-12-24 Cypress Semiconductor Corporation SONOS ONO stack scaling
US20090179253A1 (en) * 2007-05-25 2009-07-16 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US8643124B2 (en) * 2007-05-25 2014-02-04 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US8008707B2 (en) * 2007-12-14 2011-08-30 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device provided with charge storage layer in memory cell
JP5238332B2 (ja) * 2008-04-17 2013-07-17 株式会社東芝 半導体装置の製造方法
US8252653B2 (en) * 2008-10-21 2012-08-28 Applied Materials, Inc. Method of forming a non-volatile memory having a silicon nitride charge trap layer
JPWO2010061754A1 (ja) * 2008-11-28 2012-04-26 学校法人東海大学 不揮発性半導体記憶装置及びその製造方法
CN101859702B (zh) * 2009-04-10 2016-12-07 赛普拉斯半导体公司 含多层氧氮化物层的氧化物-氮化物-氧化物堆栈

Also Published As

Publication number Publication date
WO2012097373A1 (en) 2012-07-19
JP2014504027A (ja) 2014-02-13
CN102714223A (zh) 2012-10-03
JP2016197732A (ja) 2016-11-24
TW201243951A (en) 2012-11-01
JP6258412B2 (ja) 2018-01-10
TWI534897B (zh) 2016-05-21
KR20140025262A (ko) 2014-03-04

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