JP5925872B2 - 基板構造およびその製造方法 - Google Patents
基板構造およびその製造方法 Download PDFInfo
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- JP5925872B2 JP5925872B2 JP2014253970A JP2014253970A JP5925872B2 JP 5925872 B2 JP5925872 B2 JP 5925872B2 JP 2014253970 A JP2014253970 A JP 2014253970A JP 2014253970 A JP2014253970 A JP 2014253970A JP 5925872 B2 JP5925872 B2 JP 5925872B2
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- 239000000758 substrate Substances 0.000 title claims description 117
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 239000010410 layer Substances 0.000 claims description 106
- 238000000034 method Methods 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 11
- 229910000679 solder Inorganic materials 0.000 claims description 11
- 239000004642 Polyimide Substances 0.000 claims description 8
- 229920000139 polyethylene terephthalate Polymers 0.000 claims description 8
- 239000005020 polyethylene terephthalate Substances 0.000 claims description 8
- 229920001721 polyimide Polymers 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 239000011889 copper foil Substances 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 4
- -1 polyethylene terephthalate Polymers 0.000 claims description 4
- 238000009412 basement excavation Methods 0.000 claims description 3
- 239000002356 single layer Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 6
- 238000009423 ventilation Methods 0.000 description 4
- 238000007906 compression Methods 0.000 description 3
- 238000005553 drilling Methods 0.000 description 3
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910001252 Pd alloy Inorganic materials 0.000 description 1
- 229910001260 Pt alloy Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000003353 gold alloy Substances 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/114—Pad being close to via, but not surrounding the via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0145—Polyester, e.g. polyethylene terephthalate [PET], polyethylene naphthalate [PEN]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/035—Paste overlayer, i.e. conductive paste or solder paste over conductive layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0214—Back-up or entry material, e.g. for mechanical drilling
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1178—Means for venting or for letting gases escape
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
110 基板
110a 第1面
110b 第2面
112 第1スルーホール
114 誘電層
115 パッド
116 ビア
117 パターン化された半田マスク層
118 表面仕上げ層
120 キャリア
122 剥離層
124 絶縁ペースト層
126 金属層
128 第2スルーホール
D1、D2 孔径
Claims (17)
- 第1スルーホール、第1面および前記第1面と対向する第2面を含む基板と、
第2スルーホール、剥離層、絶縁ペースト層および金属層を含むキャリアと
を含み、前記第1スルーホールが、前記基板を貫通して、前記第1面と前記第2面を接続し、
前記絶縁ペースト層が、前記剥離層と前記金属層の間に配置され、前記キャリアの前記剥離層が前記第2面に張り付けられた状態であり、前記第2スルーホールが、前記第1スルーホールに対応し、前記キャリアを貫通して、前記第1スルーホールを露出する基板構造。 - 前記第2スルーホールの孔径が、前記第1スルーホールの孔径よりも大きい請求項1に記載の基板構造。
- 前記剥離層の材料が、ポリエチレンテレフタラート(PET)またはポリイミド(PI)フィルムを含む請求項1又は2に記載の基板構造。
- 前記絶縁ペースト層の材料が、プリプレグ(PP)を含む請求項1〜3のいずれか1項に記載の基板構造。
- 前記金属層が、銅箔層を含む請求項1〜4のいずれか1項に記載の基板構造。
- 前記基板が、単層回路基板である請求項1〜5のいずれか1項に記載の基板構造。
- 前記基板が、多層回路基板である請求項1〜5のいずれか1項に記載の基板構造。
- 前記基板が、さらに、誘電層、複数のパッドおよびパターン化された半田マスク層を含み、前記複数のパッドが、それぞれ、前記誘電層の2つの対向する面に配置され、前記パターン化された半田マスク層が、前記2つの対向する面を覆って、前記複数のパッドを露出し、前記第1スルーホールが、前記誘電層および前記パターン化された半田マスク層を貫通する請求項1〜7のいずれか1項に記載の基板構造。
- 前記基板が、さらに、複数のビアを含み、前記ビアが、それぞれ、前記2つの対向する面に対応して配置された前記パッドを接続する請求項8に記載の基板構造。
- 前記パッドを覆う表面仕上げ層をさらに含む請求項8に記載の基板構造。
- 第1面および前記第1面と対向する第2面を含む基板を提供することと、
前記基板の上に、前記基板を貫通して前記第1面と前記第2面を接続する第1スルーホールを形成することと、
剥離層、絶縁ペースト層および金属層を含み、前記絶縁ペースト層が前記剥離層と前記金属層の間に配置されたキャリアを提供することと、
前記キャリアの上に、前記キャリアを貫通する第2スルーホールを形成することと、
前記キャリアの前記剥離層の上に、前記基板を積層することと
を含み、前記第2スルーホールの位置が、前記第1スルーホールの位置に対応し、前記第1スルーホールを露出する基板構造の製造方法。 - 前記第2スルーホールの孔径が、前記第1スルーホールの孔径よりも大きい請求項11に記載の基板構造の製造方法。
- 前記第1スルーホールおよび前記第2スルーホールの形成方法が、機械掘削を含む請求項11又は12に記載の基板構造の製造方法。
- 前記剥離層の材料が、ポリエチレンテレフタラート(PET)またはポリイミド(PI)フィルムを含む請求項11〜13のいずれか1項に記載の基板構造の製造方法。
- 前記絶縁ペースト層の材料が、プリプレグ(PP)を含む請求項11〜14のいずれか1項に記載の基板構造の製造方法。
- 前記金属層が、銅箔層を含む請求項11〜15のいずれか1項に記載の基板構造の製造方法。
- 前記キャリアを提供する方法が、さらに、前記剥離層、前記絶縁ペースト層および前記金属層を積層することによって前記キャリアを形成することを含む請求項11〜16のいずれか1項に記載の基板構造の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW103118287A TWI576032B (zh) | 2014-05-26 | 2014-05-26 | 基板結構及其製作方法 |
TW103118287 | 2014-05-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015226054A JP2015226054A (ja) | 2015-12-14 |
JP5925872B2 true JP5925872B2 (ja) | 2016-05-25 |
Family
ID=54557075
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Application Number | Title | Priority Date | Filing Date |
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JP2014253970A Expired - Fee Related JP5925872B2 (ja) | 2014-05-26 | 2014-12-16 | 基板構造およびその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9538647B2 (ja) |
JP (1) | JP5925872B2 (ja) |
CN (1) | CN105140206B (ja) |
TW (1) | TWI576032B (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9917068B2 (en) * | 2014-03-14 | 2018-03-13 | Taiwan Semiconductor Manufacturing Company | Package substrates, packaged semiconductor devices, and methods of packaging semiconductor devices |
WO2018199003A1 (ja) * | 2017-04-27 | 2018-11-01 | 三菱瓦斯化学株式会社 | 支持体及びそれを用いた半導体素子実装基板の製造方法 |
CN109270992A (zh) * | 2017-07-17 | 2019-01-25 | 仁宝电脑工业股份有限公司 | 板状构件、包含板状构件的壳体及其制作方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11251741A (ja) * | 1998-03-06 | 1999-09-17 | Mitsui Mining & Smelting Co Ltd | 両面配線フィルムキャリアの製造方法 |
JP4334005B2 (ja) * | 2005-12-07 | 2009-09-16 | 新光電気工業株式会社 | 配線基板の製造方法及び電子部品実装構造体の製造方法 |
CN101472404B (zh) * | 2007-12-25 | 2011-12-07 | 富葵精密组件(深圳)有限公司 | 多层电路板及其制作方法 |
CN101989592B (zh) * | 2009-07-30 | 2012-07-18 | 欣兴电子股份有限公司 | 封装基板与其制法 |
TWI431742B (zh) * | 2011-04-27 | 2014-03-21 | Unimicron Technology Corp | 線路板製造方法及基層線路板 |
TWI560835B (en) * | 2011-11-07 | 2016-12-01 | Siliconware Precision Industries Co Ltd | Package substrate and fabrication method thereof |
CN103633037A (zh) * | 2012-08-27 | 2014-03-12 | 国碁电子(中山)有限公司 | 封装结构及制造方法 |
CN103635035B (zh) * | 2012-08-29 | 2016-11-09 | 宏启胜精密电子(秦皇岛)有限公司 | 电路板及其制作方法 |
KR20140057861A (ko) * | 2012-11-05 | 2014-05-14 | 삼성전기주식회사 | 인쇄회로기판 제조 방법 |
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2014
- 2014-05-26 TW TW103118287A patent/TWI576032B/zh not_active IP Right Cessation
- 2014-07-02 CN CN201410311976.0A patent/CN105140206B/zh not_active Expired - Fee Related
- 2014-08-04 US US14/450,297 patent/US9538647B2/en active Active
- 2014-12-16 JP JP2014253970A patent/JP5925872B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN105140206A (zh) | 2015-12-09 |
CN105140206B (zh) | 2018-05-25 |
TWI576032B (zh) | 2017-03-21 |
US20150342040A1 (en) | 2015-11-26 |
US9538647B2 (en) | 2017-01-03 |
JP2015226054A (ja) | 2015-12-14 |
TW201545620A (zh) | 2015-12-01 |
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