JP5901170B2 - 集積回路および集積回路のコンタクト部とプリント基板の相応するコンタクト部との間の抵抗を求める方法 - Google Patents
集積回路および集積回路のコンタクト部とプリント基板の相応するコンタクト部との間の抵抗を求める方法 Download PDFInfo
- Publication number
- JP5901170B2 JP5901170B2 JP2011163940A JP2011163940A JP5901170B2 JP 5901170 B2 JP5901170 B2 JP 5901170B2 JP 2011163940 A JP2011163940 A JP 2011163940A JP 2011163940 A JP2011163940 A JP 2011163940A JP 5901170 B2 JP5901170 B2 JP 5901170B2
- Authority
- JP
- Japan
- Prior art keywords
- contact portion
- integrated circuit
- section
- resistance
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/657—Shapes or dispositions of interconnections on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102010038453.4 | 2010-07-27 | ||
| DE102010038453A DE102010038453A1 (de) | 2010-07-27 | 2010-07-27 | Lötstellenkontrolle |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012028786A JP2012028786A (ja) | 2012-02-09 |
| JP2012028786A5 JP2012028786A5 (https=) | 2013-03-28 |
| JP5901170B2 true JP5901170B2 (ja) | 2016-04-06 |
Family
ID=45471069
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011163940A Active JP5901170B2 (ja) | 2010-07-27 | 2011-07-27 | 集積回路および集積回路のコンタクト部とプリント基板の相応するコンタクト部との間の抵抗を求める方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8810252B2 (https=) |
| JP (1) | JP5901170B2 (https=) |
| DE (1) | DE102010038453A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9635794B2 (en) | 2012-02-20 | 2017-04-25 | Trw Automotive U.S. Llc | Method and apparatus for attachment of integrated circuits |
| US8957694B2 (en) * | 2012-05-22 | 2015-02-17 | Broadcom Corporation | Wafer level package resistance monitor scheme |
| US9883582B2 (en) * | 2015-11-20 | 2018-01-30 | Hamilton Sundstrand Corporation | Circuit boards and circuit board assemblies |
| DE102020125716A1 (de) | 2020-10-01 | 2022-04-07 | Endress+Hauser SE+Co. KG | Elektronikeinheit und Verfahren zur Prüfung mindestens eines Zustands einer Elektronikeinheit |
| WO2023209856A1 (ja) * | 2022-04-27 | 2023-11-02 | 日立Astemo株式会社 | 車載制御装置 |
| DE102024209901A1 (de) * | 2024-10-10 | 2026-04-16 | Robert Bosch Gesellschaft mit beschränkter Haftung | Leistungsschaltereinheit |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01154546A (ja) * | 1987-12-10 | 1989-06-16 | Fujitsu Ltd | 端子開放検出回路半導体装置 |
| JP2977959B2 (ja) * | 1991-07-12 | 1999-11-15 | シチズン時計株式会社 | 半導体装置およびその測定方法 |
| JP2825085B2 (ja) * | 1996-08-29 | 1998-11-18 | 日本電気株式会社 | 半導体装置の実装構造、実装用基板および実装状態の検査方法 |
| JP2004363146A (ja) * | 2003-06-02 | 2004-12-24 | Matsushita Electric Ind Co Ltd | 回路基板に対する電子部品の接合品質評価用の検査チップとそれを用いた評価ツール及び評価方法 |
| JP2005347469A (ja) * | 2004-06-02 | 2005-12-15 | Denso Corp | 電子部品およびその半田付け検査システム |
| US20080218495A1 (en) * | 2007-03-08 | 2008-09-11 | Wintek Corporation | Circuit capable of selectively operating in either an inspecting mode or a driving mode for a display |
| US8522051B2 (en) * | 2007-05-07 | 2013-08-27 | Infineon Technologies Ag | Protection for circuit boards |
| JP5034781B2 (ja) * | 2007-08-27 | 2012-09-26 | 富士通株式会社 | 半田バンプの高感度抵抗測定装置及び監視方法 |
| JP2009065037A (ja) * | 2007-09-07 | 2009-03-26 | Yokogawa Electric Corp | 半導体集積回路とその検査装置 |
| JP5343555B2 (ja) * | 2008-12-22 | 2013-11-13 | 富士通株式会社 | 半導体装置、及び、はんだ接合部破壊の検出方法 |
-
2010
- 2010-07-27 DE DE102010038453A patent/DE102010038453A1/de active Pending
-
2011
- 2011-06-08 US US13/156,208 patent/US8810252B2/en active Active
- 2011-07-27 JP JP2011163940A patent/JP5901170B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| DE102010038453A1 (de) | 2012-02-02 |
| US8810252B2 (en) | 2014-08-19 |
| US20120025863A1 (en) | 2012-02-02 |
| JP2012028786A (ja) | 2012-02-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5901170B2 (ja) | 集積回路および集積回路のコンタクト部とプリント基板の相応するコンタクト部との間の抵抗を求める方法 | |
| CN110595524B (zh) | 传感器饱和故障检测 | |
| TWI546545B (zh) | 輔助測試電路及具有該輔助測試電路之晶片及電路板 | |
| JP2021114603A (ja) | 抵抗装置、抵抗装置を備えた測定回路ならびに抵抗装置用の帯状材料複合体の作製方法 | |
| CN105612696A (zh) | 电子控制装置 | |
| KR102680359B1 (ko) | 저항 측정 장치, 기판 검사 장치, 및 저항 측정 방법 | |
| US20150253157A1 (en) | Xmr angle sensor arrangement with safety mechanism and method for monitoring the same | |
| US8547132B2 (en) | Circuit board and method for testing component built in the circuit board | |
| JP5452965B2 (ja) | ポゴタワー電気チャネル自己検査式半導体試験システム | |
| US11156672B2 (en) | Semiconductor device | |
| JP2007024659A (ja) | 集積回路及び回路ボード | |
| CN112782616A (zh) | 一种外插卡连接状态的监测方法、装置及系统 | |
| JP5444930B2 (ja) | バックプレーン試験システム、バックプレーン試験ボード | |
| CN118843596A (zh) | 电容式传感器和用于运行电容式传感器的方法 | |
| KR20160006119A (ko) | 검사용 데이터 작성 장치, 검사용 데이터 작성 방법, 기록 매체에 기록된 프로그램 및 그 프로그램을 기록한 기록 매체 | |
| JP2020128881A (ja) | 短絡検査システム、及び短絡検査方法 | |
| JP3667645B2 (ja) | 汎用型バーンインボード | |
| KR20140009027A (ko) | 기판 검사 장치 및 기판 검사 방법 | |
| JP6733199B2 (ja) | 検査装置、検査方法及び検査プログラム | |
| JP2013002911A (ja) | 回路基板実装部品の検査装置および回路基板実装部品の検査方法 | |
| JP3647586B2 (ja) | 部品検査装置 | |
| JP2008298468A (ja) | 基板検査装置 | |
| JP2016044991A (ja) | 状態検査結果取得装置および状態検査結果取得方法 | |
| JPH0517667Y2 (https=) | ||
| JP6821458B2 (ja) | 検査用データ作成装置および検査用データ作成方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130212 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20140725 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20150608 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150615 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150915 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160208 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160308 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5901170 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |